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<title>DM-CtrlH7-BF-DevProgram: C:/Users/ASUS/Desktop/dm-ctrlH7-balance-9025test/Drivers/CMSIS/Include/core_cm4.h Source File</title>
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<div class="header">
  <div class="headertitle"><div class="title">core_cm4.h</div></div>
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<div class="contents">
<a href="core__cm4_8h.html">Go to the documentation of this file.</a><div class="fragment"><div class="line"><a id="l00001" name="l00001"></a><span class="lineno">    1</span><span class="comment">/**************************************************************************/</span></div>
<div class="line"><a id="l00007" name="l00007"></a><span class="lineno">    7</span><span class="comment">/*</span></div>
<div class="line"><a id="l00008" name="l00008"></a><span class="lineno">    8</span><span class="comment"> * Copyright (c) 2009-2019 Arm Limited. All rights reserved.</span></div>
<div class="line"><a id="l00009" name="l00009"></a><span class="lineno">    9</span><span class="comment"> *</span></div>
<div class="line"><a id="l00010" name="l00010"></a><span class="lineno">   10</span><span class="comment"> * SPDX-License-Identifier: Apache-2.0</span></div>
<div class="line"><a id="l00011" name="l00011"></a><span class="lineno">   11</span><span class="comment"> *</span></div>
<div class="line"><a id="l00012" name="l00012"></a><span class="lineno">   12</span><span class="comment"> * Licensed under the Apache License, Version 2.0 (the License); you may</span></div>
<div class="line"><a id="l00013" name="l00013"></a><span class="lineno">   13</span><span class="comment"> * not use this file except in compliance with the License.</span></div>
<div class="line"><a id="l00014" name="l00014"></a><span class="lineno">   14</span><span class="comment"> * You may obtain a copy of the License at</span></div>
<div class="line"><a id="l00015" name="l00015"></a><span class="lineno">   15</span><span class="comment"> *</span></div>
<div class="line"><a id="l00016" name="l00016"></a><span class="lineno">   16</span><span class="comment"> * www.apache.org/licenses/LICENSE-2.0</span></div>
<div class="line"><a id="l00017" name="l00017"></a><span class="lineno">   17</span><span class="comment"> *</span></div>
<div class="line"><a id="l00018" name="l00018"></a><span class="lineno">   18</span><span class="comment"> * Unless required by applicable law or agreed to in writing, software</span></div>
<div class="line"><a id="l00019" name="l00019"></a><span class="lineno">   19</span><span class="comment"> * distributed under the License is distributed on an AS IS BASIS, WITHOUT</span></div>
<div class="line"><a id="l00020" name="l00020"></a><span class="lineno">   20</span><span class="comment"> * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.</span></div>
<div class="line"><a id="l00021" name="l00021"></a><span class="lineno">   21</span><span class="comment"> * See the License for the specific language governing permissions and</span></div>
<div class="line"><a id="l00022" name="l00022"></a><span class="lineno">   22</span><span class="comment"> * limitations under the License.</span></div>
<div class="line"><a id="l00023" name="l00023"></a><span class="lineno">   23</span><span class="comment"> */</span></div>
<div class="line"><a id="l00024" name="l00024"></a><span class="lineno">   24</span> </div>
<div class="line"><a id="l00025" name="l00025"></a><span class="lineno">   25</span><span class="preprocessor">#if   defined ( __ICCARM__ )</span></div>
<div class="line"><a id="l00026" name="l00026"></a><span class="lineno">   26</span><span class="preprocessor">  #pragma system_include         </span><span class="comment">/* treat file as system include file for MISRA check */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00027" name="l00027"></a><span class="lineno">   27</span><span class="preprocessor">#elif defined (__clang__)</span></div>
<div class="line"><a id="l00028" name="l00028"></a><span class="lineno">   28</span><span class="preprocessor">  #pragma clang system_header   </span><span class="comment">/* treat file as system include file */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00029" name="l00029"></a><span class="lineno">   29</span><span class="preprocessor">#endif</span></div>
<div class="line"><a id="l00030" name="l00030"></a><span class="lineno">   30</span> </div>
<div class="line"><a id="l00031" name="l00031"></a><span class="lineno">   31</span><span class="preprocessor">#ifndef __CORE_CM4_H_GENERIC</span></div>
<div class="line"><a id="l00032" name="l00032"></a><span class="lineno">   32</span><span class="preprocessor">#define __CORE_CM4_H_GENERIC</span></div>
<div class="line"><a id="l00033" name="l00033"></a><span class="lineno">   33</span> </div>
<div class="line"><a id="l00034" name="l00034"></a><span class="lineno">   34</span><span class="preprocessor">#include &lt;stdint.h&gt;</span></div>
<div class="line"><a id="l00035" name="l00035"></a><span class="lineno">   35</span> </div>
<div class="line"><a id="l00036" name="l00036"></a><span class="lineno">   36</span><span class="preprocessor">#ifdef __cplusplus</span></div>
<div class="line"><a id="l00037" name="l00037"></a><span class="lineno">   37</span> <span class="keyword">extern</span> <span class="stringliteral">&quot;C&quot;</span> {</div>
<div class="line"><a id="l00038" name="l00038"></a><span class="lineno">   38</span><span class="preprocessor">#endif</span></div>
<div class="line"><a id="l00039" name="l00039"></a><span class="lineno">   39</span></div>
<div class="line"><a id="l00053" name="l00053"></a><span class="lineno">   53</span> </div>
<div class="line"><a id="l00054" name="l00054"></a><span class="lineno">   54</span> </div>
<div class="line"><a id="l00055" name="l00055"></a><span class="lineno">   55</span><span class="comment">/*******************************************************************************</span></div>
<div class="line"><a id="l00056" name="l00056"></a><span class="lineno">   56</span><span class="comment"> *                 CMSIS definitions</span></div>
<div class="line"><a id="l00057" name="l00057"></a><span class="lineno">   57</span><span class="comment"> ******************************************************************************/</span></div>
<div class="line"><a id="l00062" name="l00062"></a><span class="lineno">   62</span> </div>
<div class="line"><a id="l00063" name="l00063"></a><span class="lineno">   63</span><span class="preprocessor">#include &quot;<a class="code" href="cmsis__version_8h.html">cmsis_version.h</a>&quot;</span></div>
<div class="line"><a id="l00064" name="l00064"></a><span class="lineno">   64</span> </div>
<div class="line"><a id="l00065" name="l00065"></a><span class="lineno">   65</span><span class="comment">/* CMSIS CM4 definitions */</span></div>
<div class="line"><a id="l00066" name="l00066"></a><span class="lineno"><a class="line" href="core__cm4_8h.html#a90ffc8179476f80347379bfe29639edc">   66</a></span><span class="preprocessor">#define __CM4_CMSIS_VERSION_MAIN  (__CM_CMSIS_VERSION_MAIN)              </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00067" name="l00067"></a><span class="lineno"><a class="line" href="core__cm4_8h.html#afc7392964da961a44e916fcff7add532">   67</a></span><span class="preprocessor">#define __CM4_CMSIS_VERSION_SUB   (__CM_CMSIS_VERSION_SUB)               </span><span class="preprocessor"></span></div>
<div class="foldopen" id="foldopen00068" data-start="" data-end="">
<div class="line"><a id="l00068" name="l00068"></a><span class="lineno"><a class="line" href="core__cm4_8h.html#acb6f5d2c3271c95d0a02fd06723af25d">   68</a></span><span class="preprocessor">#define __CM4_CMSIS_VERSION       ((__CM4_CMSIS_VERSION_MAIN &lt;&lt; 16U) | \</span></div>
<div class="line"><a id="l00069" name="l00069"></a><span class="lineno">   69</span><span class="preprocessor">                                    __CM4_CMSIS_VERSION_SUB           )  </span><span class="preprocessor"></span></div>
</div>
<div class="line"><a id="l00070" name="l00070"></a><span class="lineno">   70</span> </div>
<div class="line"><a id="l00071" name="l00071"></a><span class="lineno"><a class="line" href="core__cm4_8h.html#a63ea62503c88acab19fcf3d5743009e3">   71</a></span><span class="preprocessor">#define __CORTEX_M                (4U)                                   </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00072" name="l00072"></a><span class="lineno">   72</span></div>
<div class="line"><a id="l00076" name="l00076"></a><span class="lineno">   76</span><span class="preprocessor">#if defined ( __CC_ARM )</span></div>
<div class="line"><a id="l00077" name="l00077"></a><span class="lineno">   77</span><span class="preprocessor">  #if defined __TARGET_FPU_VFP</span></div>
<div class="line"><a id="l00078" name="l00078"></a><span class="lineno">   78</span><span class="preprocessor">    #if defined (__FPU_PRESENT) &amp;&amp; (__FPU_PRESENT == 1U)</span></div>
<div class="line"><a id="l00079" name="l00079"></a><span class="lineno">   79</span><span class="preprocessor">      #define __FPU_USED       1U</span></div>
<div class="line"><a id="l00080" name="l00080"></a><span class="lineno">   80</span><span class="preprocessor">    #else</span></div>
<div class="line"><a id="l00081" name="l00081"></a><span class="lineno">   81</span><span class="preprocessor">      #error &quot;Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)&quot;</span></div>
<div class="line"><a id="l00082" name="l00082"></a><span class="lineno">   82</span><span class="preprocessor">      #define __FPU_USED       0U</span></div>
<div class="line"><a id="l00083" name="l00083"></a><span class="lineno">   83</span><span class="preprocessor">    #endif</span></div>
<div class="line"><a id="l00084" name="l00084"></a><span class="lineno">   84</span><span class="preprocessor">  #else</span></div>
<div class="line"><a id="l00085" name="l00085"></a><span class="lineno">   85</span><span class="preprocessor">    #define __FPU_USED         0U</span></div>
<div class="line"><a id="l00086" name="l00086"></a><span class="lineno">   86</span><span class="preprocessor">  #endif</span></div>
<div class="line"><a id="l00087" name="l00087"></a><span class="lineno">   87</span> </div>
<div class="line"><a id="l00088" name="l00088"></a><span class="lineno">   88</span><span class="preprocessor">#elif defined (__ARMCC_VERSION) &amp;&amp; (__ARMCC_VERSION &gt;= 6010050)</span></div>
<div class="line"><a id="l00089" name="l00089"></a><span class="lineno">   89</span><span class="preprocessor">  #if defined __ARM_FP</span></div>
<div class="line"><a id="l00090" name="l00090"></a><span class="lineno">   90</span><span class="preprocessor">    #if defined (__FPU_PRESENT) &amp;&amp; (__FPU_PRESENT == 1U)</span></div>
<div class="line"><a id="l00091" name="l00091"></a><span class="lineno">   91</span><span class="preprocessor">      #define __FPU_USED       1U</span></div>
<div class="line"><a id="l00092" name="l00092"></a><span class="lineno">   92</span><span class="preprocessor">    #else</span></div>
<div class="line"><a id="l00093" name="l00093"></a><span class="lineno">   93</span><span class="preprocessor">      #warning &quot;Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)&quot;</span></div>
<div class="line"><a id="l00094" name="l00094"></a><span class="lineno">   94</span><span class="preprocessor">      #define __FPU_USED       0U</span></div>
<div class="line"><a id="l00095" name="l00095"></a><span class="lineno">   95</span><span class="preprocessor">    #endif</span></div>
<div class="line"><a id="l00096" name="l00096"></a><span class="lineno">   96</span><span class="preprocessor">  #else</span></div>
<div class="line"><a id="l00097" name="l00097"></a><span class="lineno">   97</span><span class="preprocessor">    #define __FPU_USED         0U</span></div>
<div class="line"><a id="l00098" name="l00098"></a><span class="lineno">   98</span><span class="preprocessor">  #endif</span></div>
<div class="line"><a id="l00099" name="l00099"></a><span class="lineno">   99</span> </div>
<div class="line"><a id="l00100" name="l00100"></a><span class="lineno">  100</span><span class="preprocessor">#elif defined ( __GNUC__ )</span></div>
<div class="line"><a id="l00101" name="l00101"></a><span class="lineno">  101</span><span class="preprocessor">  #if defined (__VFP_FP__) &amp;&amp; !defined(__SOFTFP__)</span></div>
<div class="line"><a id="l00102" name="l00102"></a><span class="lineno">  102</span><span class="preprocessor">    #if defined (__FPU_PRESENT) &amp;&amp; (__FPU_PRESENT == 1U)</span></div>
<div class="line"><a id="l00103" name="l00103"></a><span class="lineno">  103</span><span class="preprocessor">      #define __FPU_USED       1U</span></div>
<div class="line"><a id="l00104" name="l00104"></a><span class="lineno">  104</span><span class="preprocessor">    #else</span></div>
<div class="line"><a id="l00105" name="l00105"></a><span class="lineno">  105</span><span class="preprocessor">      #error &quot;Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)&quot;</span></div>
<div class="line"><a id="l00106" name="l00106"></a><span class="lineno">  106</span><span class="preprocessor">      #define __FPU_USED       0U</span></div>
<div class="line"><a id="l00107" name="l00107"></a><span class="lineno">  107</span><span class="preprocessor">    #endif</span></div>
<div class="line"><a id="l00108" name="l00108"></a><span class="lineno">  108</span><span class="preprocessor">  #else</span></div>
<div class="line"><a id="l00109" name="l00109"></a><span class="lineno">  109</span><span class="preprocessor">    #define __FPU_USED         0U</span></div>
<div class="line"><a id="l00110" name="l00110"></a><span class="lineno">  110</span><span class="preprocessor">  #endif</span></div>
<div class="line"><a id="l00111" name="l00111"></a><span class="lineno">  111</span> </div>
<div class="line"><a id="l00112" name="l00112"></a><span class="lineno">  112</span><span class="preprocessor">#elif defined ( __ICCARM__ )</span></div>
<div class="line"><a id="l00113" name="l00113"></a><span class="lineno">  113</span><span class="preprocessor">  #if defined __ARMVFP__</span></div>
<div class="line"><a id="l00114" name="l00114"></a><span class="lineno">  114</span><span class="preprocessor">    #if defined (__FPU_PRESENT) &amp;&amp; (__FPU_PRESENT == 1U)</span></div>
<div class="line"><a id="l00115" name="l00115"></a><span class="lineno">  115</span><span class="preprocessor">      #define __FPU_USED       1U</span></div>
<div class="line"><a id="l00116" name="l00116"></a><span class="lineno">  116</span><span class="preprocessor">    #else</span></div>
<div class="line"><a id="l00117" name="l00117"></a><span class="lineno">  117</span><span class="preprocessor">      #error &quot;Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)&quot;</span></div>
<div class="line"><a id="l00118" name="l00118"></a><span class="lineno">  118</span><span class="preprocessor">      #define __FPU_USED       0U</span></div>
<div class="line"><a id="l00119" name="l00119"></a><span class="lineno">  119</span><span class="preprocessor">    #endif</span></div>
<div class="line"><a id="l00120" name="l00120"></a><span class="lineno">  120</span><span class="preprocessor">  #else</span></div>
<div class="line"><a id="l00121" name="l00121"></a><span class="lineno">  121</span><span class="preprocessor">    #define __FPU_USED         0U</span></div>
<div class="line"><a id="l00122" name="l00122"></a><span class="lineno">  122</span><span class="preprocessor">  #endif</span></div>
<div class="line"><a id="l00123" name="l00123"></a><span class="lineno">  123</span> </div>
<div class="line"><a id="l00124" name="l00124"></a><span class="lineno">  124</span><span class="preprocessor">#elif defined ( __TI_ARM__ )</span></div>
<div class="line"><a id="l00125" name="l00125"></a><span class="lineno">  125</span><span class="preprocessor">  #if defined __TI_VFP_SUPPORT__</span></div>
<div class="line"><a id="l00126" name="l00126"></a><span class="lineno">  126</span><span class="preprocessor">    #if defined (__FPU_PRESENT) &amp;&amp; (__FPU_PRESENT == 1U)</span></div>
<div class="line"><a id="l00127" name="l00127"></a><span class="lineno">  127</span><span class="preprocessor">      #define __FPU_USED       1U</span></div>
<div class="line"><a id="l00128" name="l00128"></a><span class="lineno">  128</span><span class="preprocessor">    #else</span></div>
<div class="line"><a id="l00129" name="l00129"></a><span class="lineno">  129</span><span class="preprocessor">      #error &quot;Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)&quot;</span></div>
<div class="line"><a id="l00130" name="l00130"></a><span class="lineno">  130</span><span class="preprocessor">      #define __FPU_USED       0U</span></div>
<div class="line"><a id="l00131" name="l00131"></a><span class="lineno">  131</span><span class="preprocessor">    #endif</span></div>
<div class="line"><a id="l00132" name="l00132"></a><span class="lineno">  132</span><span class="preprocessor">  #else</span></div>
<div class="line"><a id="l00133" name="l00133"></a><span class="lineno">  133</span><span class="preprocessor">    #define __FPU_USED         0U</span></div>
<div class="line"><a id="l00134" name="l00134"></a><span class="lineno">  134</span><span class="preprocessor">  #endif</span></div>
<div class="line"><a id="l00135" name="l00135"></a><span class="lineno">  135</span> </div>
<div class="line"><a id="l00136" name="l00136"></a><span class="lineno">  136</span><span class="preprocessor">#elif defined ( __TASKING__ )</span></div>
<div class="line"><a id="l00137" name="l00137"></a><span class="lineno">  137</span><span class="preprocessor">  #if defined __FPU_VFP__</span></div>
<div class="line"><a id="l00138" name="l00138"></a><span class="lineno">  138</span><span class="preprocessor">    #if defined (__FPU_PRESENT) &amp;&amp; (__FPU_PRESENT == 1U)</span></div>
<div class="line"><a id="l00139" name="l00139"></a><span class="lineno">  139</span><span class="preprocessor">      #define __FPU_USED       1U</span></div>
<div class="line"><a id="l00140" name="l00140"></a><span class="lineno">  140</span><span class="preprocessor">    #else</span></div>
<div class="line"><a id="l00141" name="l00141"></a><span class="lineno">  141</span><span class="preprocessor">      #error &quot;Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)&quot;</span></div>
<div class="line"><a id="l00142" name="l00142"></a><span class="lineno">  142</span><span class="preprocessor">      #define __FPU_USED       0U</span></div>
<div class="line"><a id="l00143" name="l00143"></a><span class="lineno">  143</span><span class="preprocessor">    #endif</span></div>
<div class="line"><a id="l00144" name="l00144"></a><span class="lineno">  144</span><span class="preprocessor">  #else</span></div>
<div class="line"><a id="l00145" name="l00145"></a><span class="lineno">  145</span><span class="preprocessor">    #define __FPU_USED         0U</span></div>
<div class="line"><a id="l00146" name="l00146"></a><span class="lineno">  146</span><span class="preprocessor">  #endif</span></div>
<div class="line"><a id="l00147" name="l00147"></a><span class="lineno">  147</span> </div>
<div class="line"><a id="l00148" name="l00148"></a><span class="lineno">  148</span><span class="preprocessor">#elif defined ( __CSMC__ )</span></div>
<div class="line"><a id="l00149" name="l00149"></a><span class="lineno">  149</span><span class="preprocessor">  #if ( __CSMC__ &amp; 0x400U)</span></div>
<div class="line"><a id="l00150" name="l00150"></a><span class="lineno">  150</span><span class="preprocessor">    #if defined (__FPU_PRESENT) &amp;&amp; (__FPU_PRESENT == 1U)</span></div>
<div class="line"><a id="l00151" name="l00151"></a><span class="lineno">  151</span><span class="preprocessor">      #define __FPU_USED       1U</span></div>
<div class="line"><a id="l00152" name="l00152"></a><span class="lineno">  152</span><span class="preprocessor">    #else</span></div>
<div class="line"><a id="l00153" name="l00153"></a><span class="lineno">  153</span><span class="preprocessor">      #error &quot;Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)&quot;</span></div>
<div class="line"><a id="l00154" name="l00154"></a><span class="lineno">  154</span><span class="preprocessor">      #define __FPU_USED       0U</span></div>
<div class="line"><a id="l00155" name="l00155"></a><span class="lineno">  155</span><span class="preprocessor">    #endif</span></div>
<div class="line"><a id="l00156" name="l00156"></a><span class="lineno">  156</span><span class="preprocessor">  #else</span></div>
<div class="line"><a id="l00157" name="l00157"></a><span class="lineno">  157</span><span class="preprocessor">    #define __FPU_USED         0U</span></div>
<div class="line"><a id="l00158" name="l00158"></a><span class="lineno">  158</span><span class="preprocessor">  #endif</span></div>
<div class="line"><a id="l00159" name="l00159"></a><span class="lineno">  159</span> </div>
<div class="line"><a id="l00160" name="l00160"></a><span class="lineno">  160</span><span class="preprocessor">#endif</span></div>
<div class="line"><a id="l00161" name="l00161"></a><span class="lineno">  161</span> </div>
<div class="line"><a id="l00162" name="l00162"></a><span class="lineno">  162</span><span class="preprocessor">#include &quot;<a class="code" href="cmsis__compiler_8h.html">cmsis_compiler.h</a>&quot;</span>               <span class="comment">/* CMSIS compiler specific defines */</span></div>
<div class="line"><a id="l00163" name="l00163"></a><span class="lineno">  163</span> </div>
<div class="line"><a id="l00164" name="l00164"></a><span class="lineno">  164</span> </div>
<div class="line"><a id="l00165" name="l00165"></a><span class="lineno">  165</span><span class="preprocessor">#ifdef __cplusplus</span></div>
<div class="line"><a id="l00166" name="l00166"></a><span class="lineno">  166</span>}</div>
<div class="line"><a id="l00167" name="l00167"></a><span class="lineno">  167</span><span class="preprocessor">#endif</span></div>
<div class="line"><a id="l00168" name="l00168"></a><span class="lineno">  168</span> </div>
<div class="line"><a id="l00169" name="l00169"></a><span class="lineno">  169</span><span class="preprocessor">#endif </span><span class="comment">/* __CORE_CM4_H_GENERIC */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00170" name="l00170"></a><span class="lineno">  170</span> </div>
<div class="line"><a id="l00171" name="l00171"></a><span class="lineno">  171</span><span class="preprocessor">#ifndef __CMSIS_GENERIC</span></div>
<div class="line"><a id="l00172" name="l00172"></a><span class="lineno">  172</span> </div>
<div class="line"><a id="l00173" name="l00173"></a><span class="lineno">  173</span><span class="preprocessor">#ifndef __CORE_CM4_H_DEPENDANT</span></div>
<div class="line"><a id="l00174" name="l00174"></a><span class="lineno"><a class="line" href="core__cm4_8h.html#a65104fb6a96df4ec7f7e72781b561060">  174</a></span><span class="preprocessor">#define __CORE_CM4_H_DEPENDANT</span></div>
<div class="line"><a id="l00175" name="l00175"></a><span class="lineno">  175</span> </div>
<div class="line"><a id="l00176" name="l00176"></a><span class="lineno">  176</span><span class="preprocessor">#ifdef __cplusplus</span></div>
<div class="line"><a id="l00177" name="l00177"></a><span class="lineno">  177</span> <span class="keyword">extern</span> <span class="stringliteral">&quot;C&quot;</span> {</div>
<div class="line"><a id="l00178" name="l00178"></a><span class="lineno">  178</span><span class="preprocessor">#endif</span></div>
<div class="line"><a id="l00179" name="l00179"></a><span class="lineno">  179</span> </div>
<div class="line"><a id="l00180" name="l00180"></a><span class="lineno">  180</span><span class="comment">/* check device defines and use defaults */</span></div>
<div class="line"><a id="l00181" name="l00181"></a><span class="lineno">  181</span><span class="preprocessor">#if defined __CHECK_DEVICE_DEFINES</span></div>
<div class="line"><a id="l00182" name="l00182"></a><span class="lineno">  182</span><span class="preprocessor">  #ifndef __CM4_REV</span></div>
<div class="line"><a id="l00183" name="l00183"></a><span class="lineno">  183</span><span class="preprocessor">    #define __CM4_REV               0x0000U</span></div>
<div class="line"><a id="l00184" name="l00184"></a><span class="lineno">  184</span><span class="preprocessor">    #warning &quot;__CM4_REV not defined in device header file; using default!&quot;</span></div>
<div class="line"><a id="l00185" name="l00185"></a><span class="lineno">  185</span><span class="preprocessor">  #endif</span></div>
<div class="line"><a id="l00186" name="l00186"></a><span class="lineno">  186</span> </div>
<div class="line"><a id="l00187" name="l00187"></a><span class="lineno">  187</span><span class="preprocessor">  #ifndef __FPU_PRESENT</span></div>
<div class="line"><a id="l00188" name="l00188"></a><span class="lineno">  188</span><span class="preprocessor">    #define __FPU_PRESENT             0U</span></div>
<div class="line"><a id="l00189" name="l00189"></a><span class="lineno">  189</span><span class="preprocessor">    #warning &quot;__FPU_PRESENT not defined in device header file; using default!&quot;</span></div>
<div class="line"><a id="l00190" name="l00190"></a><span class="lineno">  190</span><span class="preprocessor">  #endif</span></div>
<div class="line"><a id="l00191" name="l00191"></a><span class="lineno">  191</span> </div>
<div class="line"><a id="l00192" name="l00192"></a><span class="lineno">  192</span><span class="preprocessor">  #ifndef __MPU_PRESENT</span></div>
<div class="line"><a id="l00193" name="l00193"></a><span class="lineno">  193</span><span class="preprocessor">    #define __MPU_PRESENT             0U</span></div>
<div class="line"><a id="l00194" name="l00194"></a><span class="lineno">  194</span><span class="preprocessor">    #warning &quot;__MPU_PRESENT not defined in device header file; using default!&quot;</span></div>
<div class="line"><a id="l00195" name="l00195"></a><span class="lineno">  195</span><span class="preprocessor">  #endif</span></div>
<div class="line"><a id="l00196" name="l00196"></a><span class="lineno">  196</span> </div>
<div class="line"><a id="l00197" name="l00197"></a><span class="lineno">  197</span><span class="preprocessor">  #ifndef __NVIC_PRIO_BITS</span></div>
<div class="line"><a id="l00198" name="l00198"></a><span class="lineno">  198</span><span class="preprocessor">    #define __NVIC_PRIO_BITS          3U</span></div>
<div class="line"><a id="l00199" name="l00199"></a><span class="lineno">  199</span><span class="preprocessor">    #warning &quot;__NVIC_PRIO_BITS not defined in device header file; using default!&quot;</span></div>
<div class="line"><a id="l00200" name="l00200"></a><span class="lineno">  200</span><span class="preprocessor">  #endif</span></div>
<div class="line"><a id="l00201" name="l00201"></a><span class="lineno">  201</span> </div>
<div class="line"><a id="l00202" name="l00202"></a><span class="lineno">  202</span><span class="preprocessor">  #ifndef __Vendor_SysTickConfig</span></div>
<div class="line"><a id="l00203" name="l00203"></a><span class="lineno">  203</span><span class="preprocessor">    #define __Vendor_SysTickConfig    0U</span></div>
<div class="line"><a id="l00204" name="l00204"></a><span class="lineno">  204</span><span class="preprocessor">    #warning &quot;__Vendor_SysTickConfig not defined in device header file; using default!&quot;</span></div>
<div class="line"><a id="l00205" name="l00205"></a><span class="lineno">  205</span><span class="preprocessor">  #endif</span></div>
<div class="line"><a id="l00206" name="l00206"></a><span class="lineno">  206</span><span class="preprocessor">#endif</span></div>
<div class="line"><a id="l00207" name="l00207"></a><span class="lineno">  207</span> </div>
<div class="line"><a id="l00208" name="l00208"></a><span class="lineno">  208</span><span class="comment">/* IO definitions (access restrictions to peripheral registers) */</span></div>
<div class="line"><a id="l00216" name="l00216"></a><span class="lineno">  216</span><span class="preprocessor">#ifdef __cplusplus</span></div>
<div class="line"><a id="l00217" name="l00217"></a><span class="lineno">  217</span><span class="preprocessor">  #define   __I     volatile             </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00218" name="l00218"></a><span class="lineno">  218</span><span class="preprocessor">#else</span></div>
<div class="line"><a id="l00219" name="l00219"></a><span class="lineno"><a class="line" href="core__cm4_8h.html#af63697ed9952cc71e1225efe205f6cd3">  219</a></span><span class="preprocessor">  #define   __I     volatile const       </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00220" name="l00220"></a><span class="lineno">  220</span><span class="preprocessor">#endif</span></div>
<div class="line"><a id="l00221" name="l00221"></a><span class="lineno"><a class="line" href="core__cm4_8h.html#a7e25d9380f9ef903923964322e71f2f6">  221</a></span><span class="preprocessor">#define     __O     volatile             </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00222" name="l00222"></a><span class="lineno"><a class="line" href="core__cm4_8h.html#aec43007d9998a0a0e01faede4133d6be">  222</a></span><span class="preprocessor">#define     __IO    volatile             </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00223" name="l00223"></a><span class="lineno">  223</span> </div>
<div class="line"><a id="l00224" name="l00224"></a><span class="lineno">  224</span><span class="comment">/* following defines should be used for structure members */</span></div>
<div class="line"><a id="l00225" name="l00225"></a><span class="lineno">  225</span><span class="preprocessor">#define     __IM     volatile const      </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00226" name="l00226"></a><span class="lineno">  226</span><span class="preprocessor">#define     __OM     volatile            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00227" name="l00227"></a><span class="lineno">  227</span><span class="preprocessor">#define     __IOM    volatile            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00228" name="l00228"></a><span class="lineno">  228</span></div>
<div class="line"><a id="l00230" name="l00230"></a><span class="lineno">  230</span> </div>
<div class="line"><a id="l00231" name="l00231"></a><span class="lineno">  231</span> </div>
<div class="line"><a id="l00232" name="l00232"></a><span class="lineno">  232</span> </div>
<div class="line"><a id="l00233" name="l00233"></a><span class="lineno">  233</span><span class="comment">/*******************************************************************************</span></div>
<div class="line"><a id="l00234" name="l00234"></a><span class="lineno">  234</span><span class="comment"> *                 Register Abstraction</span></div>
<div class="line"><a id="l00235" name="l00235"></a><span class="lineno">  235</span><span class="comment">  Core Register contain:</span></div>
<div class="line"><a id="l00236" name="l00236"></a><span class="lineno">  236</span><span class="comment">  - Core Register</span></div>
<div class="line"><a id="l00237" name="l00237"></a><span class="lineno">  237</span><span class="comment">  - Core NVIC Register</span></div>
<div class="line"><a id="l00238" name="l00238"></a><span class="lineno">  238</span><span class="comment">  - Core SCB Register</span></div>
<div class="line"><a id="l00239" name="l00239"></a><span class="lineno">  239</span><span class="comment">  - Core SysTick Register</span></div>
<div class="line"><a id="l00240" name="l00240"></a><span class="lineno">  240</span><span class="comment">  - Core Debug Register</span></div>
<div class="line"><a id="l00241" name="l00241"></a><span class="lineno">  241</span><span class="comment">  - Core MPU Register</span></div>
<div class="line"><a id="l00242" name="l00242"></a><span class="lineno">  242</span><span class="comment">  - Core FPU Register</span></div>
<div class="line"><a id="l00243" name="l00243"></a><span class="lineno">  243</span><span class="comment"> ******************************************************************************/</span></div>
<div class="line"><a id="l00248" name="l00248"></a><span class="lineno">  248</span></div>
<div class="line"><a id="l00255" name="l00255"></a><span class="lineno">  255</span></div>
<div class="line"><a id="l00259" name="l00259"></a><span class="lineno">  259</span><span class="keyword">typedef</span> <span class="keyword">union</span></div>
<div class="line"><a id="l00260" name="l00260"></a><span class="lineno">  260</span>{</div>
<div class="line"><a id="l00261" name="l00261"></a><span class="lineno">  261</span>  <span class="keyword">struct</span></div>
<div class="line"><a id="l00262" name="l00262"></a><span class="lineno">  262</span>  {</div>
<div class="line"><a id="l00263" name="l00263"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s__core___debug_functions.html#ga3ff4752800a7352563923648299784ba">  263</a></span>    uint32_t <a class="code hl_variable" href="group___c_m_s_i_s__core___debug_functions.html#ga3ff4752800a7352563923648299784ba">_reserved0</a>:16;              </div>
<div class="line"><a id="l00264" name="l00264"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s__core___debug_functions.html#ga517e5d906b9e467c17115a120b6e073d">  264</a></span>    uint32_t <a class="code hl_variable" href="group___c_m_s_i_s__core___debug_functions.html#ga517e5d906b9e467c17115a120b6e073d">GE</a>:4;                       </div>
<div class="line"><a id="l00265" name="l00265"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s__core___debug_functions.html#gaba563115509fe04ec94ea2b95de44a79">  265</a></span>    uint32_t <a class="code hl_variable" href="group___c_m_s_i_s__core___debug_functions.html#gaba563115509fe04ec94ea2b95de44a79">_reserved1</a>:7;               </div>
<div class="line"><a id="l00266" name="l00266"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s__core___debug_functions.html#ga03a80aa673650f64aee45ac64dfdc282">  266</a></span>    uint32_t <a class="code hl_variable" href="group___c_m_s_i_s__core___debug_functions.html#ga03a80aa673650f64aee45ac64dfdc282">Q</a>:1;                        </div>
<div class="line"><a id="l00267" name="l00267"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s__core___debug_functions.html#ga161eea27756b1933ceb71141b2c1c6a2">  267</a></span>    uint32_t <a class="code hl_variable" href="group___c_m_s_i_s__core___debug_functions.html#ga161eea27756b1933ceb71141b2c1c6a2">V</a>:1;                        </div>
<div class="line"><a id="l00268" name="l00268"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s__core___debug_functions.html#ga609bf0a23fd2f2ea14a7e1179c67a432">  268</a></span>    uint32_t <a class="code hl_variable" href="group___c_m_s_i_s__core___debug_functions.html#ga609bf0a23fd2f2ea14a7e1179c67a432">C</a>:1;                        </div>
<div class="line"><a id="l00269" name="l00269"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s__core___debug_functions.html#gabe24c0efd56e8ce90fda55c1d0134371">  269</a></span>    uint32_t <a class="code hl_variable" href="group___c_m_s_i_s__core___debug_functions.html#gabe24c0efd56e8ce90fda55c1d0134371">Z</a>:1;                        </div>
<div class="line"><a id="l00270" name="l00270"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s__core___debug_functions.html#ga6aee20dd7d57d68ef7f162ca8708c327">  270</a></span>    uint32_t <a class="code hl_variable" href="group___c_m_s_i_s__core___debug_functions.html#ga6aee20dd7d57d68ef7f162ca8708c327">N</a>:1;                        </div>
<div class="line"><a id="l00271" name="l00271"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s__core___debug_functions.html#ga1c6be3063e1e9d19399f2add0f1ef6c8">  271</a></span>  } b;                                   </div>
<div class="line"><a id="l00272" name="l00272"></a><span class="lineno">  272</span>  uint32_t w;                            </div>
<div class="line"><a id="l00273" name="l00273"></a><span class="lineno">  273</span>} <a class="code hl_union" href="union_a_p_s_r___type.html">APSR_Type</a>;</div>
<div class="line"><a id="l00274" name="l00274"></a><span class="lineno">  274</span> </div>
<div class="line"><a id="l00275" name="l00275"></a><span class="lineno">  275</span><span class="comment">/* APSR Register Definitions */</span></div>
<div class="line"><a id="l00276" name="l00276"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gac469528d210043c7bd3f12f0e6824766">  276</a></span><span class="preprocessor">#define APSR_N_Pos                         31U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00277" name="l00277"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gadbc2cf55a026f661b53fadfcf822cef1">  277</a></span><span class="preprocessor">#define APSR_N_Msk                         (1UL &lt;&lt; APSR_N_Pos)                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00278" name="l00278"></a><span class="lineno">  278</span> </div>
<div class="line"><a id="l00279" name="l00279"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga3661286d108b1aca308d7445685eae3a">  279</a></span><span class="preprocessor">#define APSR_Z_Pos                         30U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00280" name="l00280"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga1deb4d1aa72bb83d1f79329406f15711">  280</a></span><span class="preprocessor">#define APSR_Z_Msk                         (1UL &lt;&lt; APSR_Z_Pos)                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00281" name="l00281"></a><span class="lineno">  281</span> </div>
<div class="line"><a id="l00282" name="l00282"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga6cf72aa6f09a168f9e5beda1a4a887b9">  282</a></span><span class="preprocessor">#define APSR_C_Pos                         29U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00283" name="l00283"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga6d47803fbad455bc10bd1ce59f2f335d">  283</a></span><span class="preprocessor">#define APSR_C_Msk                         (1UL &lt;&lt; APSR_C_Pos)                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00284" name="l00284"></a><span class="lineno">  284</span> </div>
<div class="line"><a id="l00285" name="l00285"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gac62830f67679ccd11658c4172c3e6ea7">  285</a></span><span class="preprocessor">#define APSR_V_Pos                         28U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00286" name="l00286"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga33305d6701356bff6890b315fe8b5489">  286</a></span><span class="preprocessor">#define APSR_V_Msk                         (1UL &lt;&lt; APSR_V_Pos)                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00287" name="l00287"></a><span class="lineno">  287</span> </div>
<div class="line"><a id="l00288" name="l00288"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga298749e176f12827328bb7b92a6b2411">  288</a></span><span class="preprocessor">#define APSR_Q_Pos                         27U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00289" name="l00289"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga90ffd4ec4149c2f5dd7747c1533fb002">  289</a></span><span class="preprocessor">#define APSR_Q_Msk                         (1UL &lt;&lt; APSR_Q_Pos)                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00290" name="l00290"></a><span class="lineno">  290</span> </div>
<div class="line"><a id="l00291" name="l00291"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga722cb42b5c75af3e8909fac6fd40dfdc">  291</a></span><span class="preprocessor">#define APSR_GE_Pos                        16U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00292" name="l00292"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga8a3ecbc0ea2029462b0f4ce50e227db1">  292</a></span><span class="preprocessor">#define APSR_GE_Msk                        (0xFUL &lt;&lt; APSR_GE_Pos)                         </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00293" name="l00293"></a><span class="lineno">  293</span> </div>
<div class="line"><a id="l00294" name="l00294"></a><span class="lineno">  294</span></div>
<div class="line"><a id="l00298" name="l00298"></a><span class="lineno">  298</span><span class="keyword">typedef</span> <span class="keyword">union</span></div>
<div class="line"><a id="l00299" name="l00299"></a><span class="lineno">  299</span>{</div>
<div class="line"><a id="l00300" name="l00300"></a><span class="lineno">  300</span>  <span class="keyword">struct</span></div>
<div class="line"><a id="l00301" name="l00301"></a><span class="lineno">  301</span>  {</div>
<div class="line"><a id="l00302" name="l00302"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s__core___debug_functions.html#ga020c03908da53c289645e5f060fe2f4f">  302</a></span>    uint32_t <a class="code hl_variable" href="group___c_m_s_i_s__core___debug_functions.html#ga020c03908da53c289645e5f060fe2f4f">ISR</a>:9;                      </div>
<div class="line"><a id="l00303" name="l00303"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s__core___debug_functions.html#ga2c5479a72da1e98ae31b25b7d00e6f5b">  303</a></span>    uint32_t <a class="code hl_variable" href="group___c_m_s_i_s__core___debug_functions.html#ga2c5479a72da1e98ae31b25b7d00e6f5b">_reserved0</a>:23;              </div>
<div class="line"><a id="l00304" name="l00304"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s__core___debug_functions.html#gaf4aff0ac0da6c4c35a9db30f1b452105">  304</a></span>  } b;                                   </div>
<div class="line"><a id="l00305" name="l00305"></a><span class="lineno">  305</span>  uint32_t w;                            </div>
<div class="line"><a id="l00306" name="l00306"></a><span class="lineno">  306</span>} <a class="code hl_union" href="union_i_p_s_r___type.html">IPSR_Type</a>;</div>
<div class="line"><a id="l00307" name="l00307"></a><span class="lineno">  307</span> </div>
<div class="line"><a id="l00308" name="l00308"></a><span class="lineno">  308</span><span class="comment">/* IPSR Register Definitions */</span></div>
<div class="line"><a id="l00309" name="l00309"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga0e34027584d02c43811ae908a5ca9adf">  309</a></span><span class="preprocessor">#define IPSR_ISR_Pos                        0U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00310" name="l00310"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gaf013a4579a64d1f21f56ea9f1b33ab56">  310</a></span><span class="preprocessor">#define IPSR_ISR_Msk                       (0x1FFUL </span><span class="comment">/*&lt;&lt; IPSR_ISR_Pos*/</span><span class="preprocessor">)                  </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00311" name="l00311"></a><span class="lineno">  311</span> </div>
<div class="line"><a id="l00312" name="l00312"></a><span class="lineno">  312</span></div>
<div class="line"><a id="l00316" name="l00316"></a><span class="lineno">  316</span><span class="keyword">typedef</span> <span class="keyword">union</span></div>
<div class="line"><a id="l00317" name="l00317"></a><span class="lineno">  317</span>{</div>
<div class="line"><a id="l00318" name="l00318"></a><span class="lineno">  318</span>  <span class="keyword">struct</span></div>
<div class="line"><a id="l00319" name="l00319"></a><span class="lineno">  319</span>  {</div>
<div class="line"><a id="l00320" name="l00320"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s__core___debug_functions.html#ga54cf3f871c47862b5f3bf041d756c1b0">  320</a></span>    uint32_t <a class="code hl_variable" href="group___c_m_s_i_s__core___debug_functions.html#ga54cf3f871c47862b5f3bf041d756c1b0">ISR</a>:9;                      </div>
<div class="line"><a id="l00321" name="l00321"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s__core___debug_functions.html#gaecc118f90b711962ad255e03cd432e11">  321</a></span>    uint32_t <a class="code hl_variable" href="group___c_m_s_i_s__core___debug_functions.html#gaecc118f90b711962ad255e03cd432e11">_reserved0</a>:1;               </div>
<div class="line"><a id="l00322" name="l00322"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s__core___debug_functions.html#ga47c38d9444d4c758cf6787bed2f4a8f3">  322</a></span>    uint32_t <a class="code hl_variable" href="group___c_m_s_i_s__core___debug_functions.html#ga47c38d9444d4c758cf6787bed2f4a8f3">ICI_IT_1</a>:6;                 </div>
<div class="line"><a id="l00323" name="l00323"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s__core___debug_functions.html#ga84ec11223673f2be57ad0cd60e3a8dda">  323</a></span>    uint32_t <a class="code hl_variable" href="group___c_m_s_i_s__core___debug_functions.html#ga84ec11223673f2be57ad0cd60e3a8dda">GE</a>:4;                       </div>
<div class="line"><a id="l00324" name="l00324"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s__core___debug_functions.html#ga6d6d145872a9a95e164a76136967eccd">  324</a></span>    uint32_t <a class="code hl_variable" href="group___c_m_s_i_s__core___debug_functions.html#ga6d6d145872a9a95e164a76136967eccd">_reserved1</a>:4;               </div>
<div class="line"><a id="l00325" name="l00325"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s__core___debug_functions.html#gaa5184c040454501865325e66d9fc64d8">  325</a></span>    uint32_t <a class="code hl_variable" href="group___c_m_s_i_s__core___debug_functions.html#gaa5184c040454501865325e66d9fc64d8">T</a>:1;                        </div>
<div class="line"><a id="l00326" name="l00326"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s__core___debug_functions.html#ga95d6229e895bd5e89d70930065bd94f8">  326</a></span>    uint32_t <a class="code hl_variable" href="group___c_m_s_i_s__core___debug_functions.html#ga95d6229e895bd5e89d70930065bd94f8">ICI_IT_2</a>:2;                 </div>
<div class="line"><a id="l00327" name="l00327"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s__core___debug_functions.html#ga2e6a04bdd68255ed242c1c648914ded7">  327</a></span>    uint32_t <a class="code hl_variable" href="group___c_m_s_i_s__core___debug_functions.html#ga2e6a04bdd68255ed242c1c648914ded7">Q</a>:1;                        </div>
<div class="line"><a id="l00328" name="l00328"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s__core___debug_functions.html#gab5eacf5e26d254a569c0f022c8b30479">  328</a></span>    uint32_t <a class="code hl_variable" href="group___c_m_s_i_s__core___debug_functions.html#gab5eacf5e26d254a569c0f022c8b30479">V</a>:1;                        </div>
<div class="line"><a id="l00329" name="l00329"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s__core___debug_functions.html#ga1888c0864bf87a4494a9521e7eb75ae2">  329</a></span>    uint32_t <a class="code hl_variable" href="group___c_m_s_i_s__core___debug_functions.html#ga1888c0864bf87a4494a9521e7eb75ae2">C</a>:1;                        </div>
<div class="line"><a id="l00330" name="l00330"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s__core___debug_functions.html#ga2c9858e7d1675fe63ac44834a9952851">  330</a></span>    uint32_t <a class="code hl_variable" href="group___c_m_s_i_s__core___debug_functions.html#ga2c9858e7d1675fe63ac44834a9952851">Z</a>:1;                        </div>
<div class="line"><a id="l00331" name="l00331"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s__core___debug_functions.html#gab2d177f2a46e98a7fd51788630a90e9f">  331</a></span>    uint32_t <a class="code hl_variable" href="group___c_m_s_i_s__core___debug_functions.html#gab2d177f2a46e98a7fd51788630a90e9f">N</a>:1;                        </div>
<div class="line"><a id="l00332" name="l00332"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s__core___debug_functions.html#ga6792b84b98d707c3d187c458b19034dd">  332</a></span>  } b;                                   </div>
<div class="line"><a id="l00333" name="l00333"></a><span class="lineno">  333</span>  uint32_t w;                            </div>
<div class="line"><a id="l00334" name="l00334"></a><span class="lineno">  334</span>} <a class="code hl_union" href="unionx_p_s_r___type.html">xPSR_Type</a>;</div>
<div class="line"><a id="l00335" name="l00335"></a><span class="lineno">  335</span> </div>
<div class="line"><a id="l00336" name="l00336"></a><span class="lineno">  336</span><span class="comment">/* xPSR Register Definitions */</span></div>
<div class="line"><a id="l00337" name="l00337"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga031eb1b8ebcdb3d602d0b9f2ec82a7ae">  337</a></span><span class="preprocessor">#define xPSR_N_Pos                         31U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00338" name="l00338"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gaf600f4ff41b62cf2f3b0a59b6d2e93d6">  338</a></span><span class="preprocessor">#define xPSR_N_Msk                         (1UL &lt;&lt; xPSR_N_Pos)                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00339" name="l00339"></a><span class="lineno">  339</span> </div>
<div class="line"><a id="l00340" name="l00340"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga5869dd608eea73c80f0567d781d2230b">  340</a></span><span class="preprocessor">#define xPSR_Z_Pos                         30U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00341" name="l00341"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga907599209fba99f579778e662021c4f2">  341</a></span><span class="preprocessor">#define xPSR_Z_Msk                         (1UL &lt;&lt; xPSR_Z_Pos)                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00342" name="l00342"></a><span class="lineno">  342</span> </div>
<div class="line"><a id="l00343" name="l00343"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga14adb79b91f6634b351a1b57394e2db6">  343</a></span><span class="preprocessor">#define xPSR_C_Pos                         29U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00344" name="l00344"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga21e2497255d380f956ca0f48d11d0775">  344</a></span><span class="preprocessor">#define xPSR_C_Msk                         (1UL &lt;&lt; xPSR_C_Pos)                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00345" name="l00345"></a><span class="lineno">  345</span> </div>
<div class="line"><a id="l00346" name="l00346"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gae0cfbb394490db402623d97e6a979e00">  346</a></span><span class="preprocessor">#define xPSR_V_Pos                         28U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00347" name="l00347"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gab07f94ed3b6ee695f5af719dc27995c2">  347</a></span><span class="preprocessor">#define xPSR_V_Msk                         (1UL &lt;&lt; xPSR_V_Pos)                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00348" name="l00348"></a><span class="lineno">  348</span> </div>
<div class="line"><a id="l00349" name="l00349"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gaabb4178d50676a8f19cf8f727f38ace8">  349</a></span><span class="preprocessor">#define xPSR_Q_Pos                         27U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00350" name="l00350"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga133ac393c38559ae43ac36383e731dd4">  350</a></span><span class="preprocessor">#define xPSR_Q_Msk                         (1UL &lt;&lt; xPSR_Q_Pos)                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00351" name="l00351"></a><span class="lineno">  351</span> </div>
<div class="line"><a id="l00352" name="l00352"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gaffb36d1bb0280b1caafcf9b00f6a6da0">  352</a></span><span class="preprocessor">#define xPSR_ICI_IT_2_Pos                  25U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00353" name="l00353"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gaa47c89b028499f8d9ebe6d554439a2b3">  353</a></span><span class="preprocessor">#define xPSR_ICI_IT_2_Msk                  (3UL &lt;&lt; xPSR_ICI_IT_2_Pos)                     </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00354" name="l00354"></a><span class="lineno">  354</span> </div>
<div class="line"><a id="l00355" name="l00355"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga98d801da9a49cda944f52aeae104dd38">  355</a></span><span class="preprocessor">#define xPSR_T_Pos                         24U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00356" name="l00356"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga30ae2111816e82d47636a8d4577eb6ee">  356</a></span><span class="preprocessor">#define xPSR_T_Msk                         (1UL &lt;&lt; xPSR_T_Pos)                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00357" name="l00357"></a><span class="lineno">  357</span> </div>
<div class="line"><a id="l00358" name="l00358"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gae2b0f3def0f378e9f1d10a4c727a064b">  358</a></span><span class="preprocessor">#define xPSR_GE_Pos                        16U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00359" name="l00359"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga967634e605d013e9b07002eca31f7903">  359</a></span><span class="preprocessor">#define xPSR_GE_Msk                        (0xFUL &lt;&lt; xPSR_GE_Pos)                         </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00360" name="l00360"></a><span class="lineno">  360</span> </div>
<div class="line"><a id="l00361" name="l00361"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gafdcd08cbd7116d65ae1a5b8182dc55ae">  361</a></span><span class="preprocessor">#define xPSR_ICI_IT_1_Pos                  10U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00362" name="l00362"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gae98918458d70d79b32ce200b55ffe744">  362</a></span><span class="preprocessor">#define xPSR_ICI_IT_1_Msk                  (0x3FUL &lt;&lt; xPSR_ICI_IT_1_Pos)                  </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00363" name="l00363"></a><span class="lineno">  363</span> </div>
<div class="line"><a id="l00364" name="l00364"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga21bff245fb1aef9683f693d9d7bb2233">  364</a></span><span class="preprocessor">#define xPSR_ISR_Pos                        0U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00365" name="l00365"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gadf8eed87e0081dfe1ef1c78a0ea91afd">  365</a></span><span class="preprocessor">#define xPSR_ISR_Msk                       (0x1FFUL </span><span class="comment">/*&lt;&lt; xPSR_ISR_Pos*/</span><span class="preprocessor">)                  </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00366" name="l00366"></a><span class="lineno">  366</span> </div>
<div class="line"><a id="l00367" name="l00367"></a><span class="lineno">  367</span></div>
<div class="line"><a id="l00371" name="l00371"></a><span class="lineno">  371</span><span class="keyword">typedef</span> <span class="keyword">union</span></div>
<div class="line"><a id="l00372" name="l00372"></a><span class="lineno">  372</span>{</div>
<div class="line"><a id="l00373" name="l00373"></a><span class="lineno">  373</span>  <span class="keyword">struct</span></div>
<div class="line"><a id="l00374" name="l00374"></a><span class="lineno">  374</span>  {</div>
<div class="line"><a id="l00375" name="l00375"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s__core___debug_functions.html#ga3dc69c02bdc85efc5c891a925c7a6375">  375</a></span>    uint32_t <a class="code hl_variable" href="group___c_m_s_i_s__core___debug_functions.html#ga3dc69c02bdc85efc5c891a925c7a6375">nPRIV</a>:1;                    </div>
<div class="line"><a id="l00376" name="l00376"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s__core___debug_functions.html#ga0a0fb55478366383222f859a919d70d9">  376</a></span>    uint32_t <a class="code hl_variable" href="group___c_m_s_i_s__core___debug_functions.html#ga0a0fb55478366383222f859a919d70d9">SPSEL</a>:1;                    </div>
<div class="line"><a id="l00377" name="l00377"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s__core___debug_functions.html#ga7e95d81e18c798719e10890add614452">  377</a></span>    uint32_t <a class="code hl_variable" href="group___c_m_s_i_s__core___debug_functions.html#ga7e95d81e18c798719e10890add614452">FPCA</a>:1;                     </div>
<div class="line"><a id="l00378" name="l00378"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s__core___debug_functions.html#ga2cb7e5e6e3ecb2460cddc00365f3c61a">  378</a></span>    uint32_t <a class="code hl_variable" href="group___c_m_s_i_s__core___debug_functions.html#ga2cb7e5e6e3ecb2460cddc00365f3c61a">_reserved0</a>:29;              </div>
<div class="line"><a id="l00379" name="l00379"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s__core___debug_functions.html#ga7c64c357c468e50398fcd7ce385d7835">  379</a></span>  } b;                                   </div>
<div class="line"><a id="l00380" name="l00380"></a><span class="lineno">  380</span>  uint32_t w;                            </div>
<div class="line"><a id="l00381" name="l00381"></a><span class="lineno">  381</span>} <a class="code hl_union" href="union_c_o_n_t_r_o_l___type.html">CONTROL_Type</a>;</div>
<div class="line"><a id="l00382" name="l00382"></a><span class="lineno">  382</span> </div>
<div class="line"><a id="l00383" name="l00383"></a><span class="lineno">  383</span><span class="comment">/* CONTROL Register Definitions */</span></div>
<div class="line"><a id="l00384" name="l00384"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gac7018b59b07134c5363b33eb94918a58">  384</a></span><span class="preprocessor">#define CONTROL_FPCA_Pos                    2U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00385" name="l00385"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gad20bb0212b2e1864f24af38d93587c79">  385</a></span><span class="preprocessor">#define CONTROL_FPCA_Msk                   (1UL &lt;&lt; CONTROL_FPCA_Pos)                      </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00386" name="l00386"></a><span class="lineno">  386</span> </div>
<div class="line"><a id="l00387" name="l00387"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga07eafc53e609895342c6a530e9d01310">  387</a></span><span class="preprocessor">#define CONTROL_SPSEL_Pos                   1U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00388" name="l00388"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga70b29840969b06909da21369b0b05b53">  388</a></span><span class="preprocessor">#define CONTROL_SPSEL_Msk                  (1UL &lt;&lt; CONTROL_SPSEL_Pos)                     </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00389" name="l00389"></a><span class="lineno">  389</span> </div>
<div class="line"><a id="l00390" name="l00390"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga51b95bc03ec0d815b459bde0b14a5908">  390</a></span><span class="preprocessor">#define CONTROL_nPRIV_Pos                   0U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00391" name="l00391"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gaef3b20d77acb213338f89ce5e7bc36b0">  391</a></span><span class="preprocessor">#define CONTROL_nPRIV_Msk                  (1UL </span><span class="comment">/*&lt;&lt; CONTROL_nPRIV_Pos*/</span><span class="preprocessor">)                 </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00392" name="l00392"></a><span class="lineno">  392</span></div>
<div class="line"><a id="l00394" name="l00394"></a><span class="lineno">  394</span> </div>
<div class="line"><a id="l00395" name="l00395"></a><span class="lineno">  395</span></div>
<div class="line"><a id="l00402" name="l00402"></a><span class="lineno">  402</span></div>
<div class="line"><a id="l00406" name="l00406"></a><span class="lineno">  406</span><span class="keyword">typedef</span> <span class="keyword">struct</span></div>
<div class="line"><a id="l00407" name="l00407"></a><span class="lineno">  407</span>{</div>
<div class="line"><a id="l00408" name="l00408"></a><span class="lineno">  408</span>  __IOM uint32_t ISER[8U];               </div>
<div class="line"><a id="l00409" name="l00409"></a><span class="lineno">  409</span>        uint32_t RESERVED0[24U];</div>
<div class="line"><a id="l00410" name="l00410"></a><span class="lineno">  410</span>  __IOM uint32_t ICER[8U];               </div>
<div class="line"><a id="l00411" name="l00411"></a><span class="lineno">  411</span>        uint32_t RESERVED1[24U];</div>
<div class="line"><a id="l00412" name="l00412"></a><span class="lineno">  412</span>  __IOM uint32_t ISPR[8U];               </div>
<div class="line"><a id="l00413" name="l00413"></a><span class="lineno">  413</span>        uint32_t RESERVED2[24U];</div>
<div class="line"><a id="l00414" name="l00414"></a><span class="lineno">  414</span>  __IOM uint32_t ICPR[8U];               </div>
<div class="line"><a id="l00415" name="l00415"></a><span class="lineno">  415</span>        uint32_t RESERVED3[24U];</div>
<div class="line"><a id="l00416" name="l00416"></a><span class="lineno">  416</span>  __IOM uint32_t IABR[8U];               </div>
<div class="line"><a id="l00417" name="l00417"></a><span class="lineno">  417</span>        uint32_t RESERVED4[56U];</div>
<div class="line"><a id="l00418" name="l00418"></a><span class="lineno">  418</span>  __IOM uint8_t  IP[240U];               </div>
<div class="line"><a id="l00419" name="l00419"></a><span class="lineno">  419</span>        uint32_t RESERVED5[644U];</div>
<div class="line"><a id="l00420" name="l00420"></a><span class="lineno">  420</span>  __OM  uint32_t STIR;                   </div>
<div class="line"><a id="l00421" name="l00421"></a><span class="lineno">  421</span>}  <a class="code hl_struct" href="struct_n_v_i_c___type.html">NVIC_Type</a>;</div>
<div class="line"><a id="l00422" name="l00422"></a><span class="lineno">  422</span> </div>
<div class="line"><a id="l00423" name="l00423"></a><span class="lineno">  423</span><span class="comment">/* Software Triggered Interrupt Register Definitions */</span></div>
<div class="line"><a id="l00424" name="l00424"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga9eebe495e2e48d302211108837a2b3e8">  424</a></span><span class="preprocessor">#define NVIC_STIR_INTID_Pos                 0U                                         </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00425" name="l00425"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gae4060c4dfcebb08871ca4244176ce752">  425</a></span><span class="preprocessor">#define NVIC_STIR_INTID_Msk                (0x1FFUL </span><span class="comment">/*&lt;&lt; NVIC_STIR_INTID_Pos*/</span><span class="preprocessor">)        </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00426" name="l00426"></a><span class="lineno">  426</span></div>
<div class="line"><a id="l00428" name="l00428"></a><span class="lineno">  428</span> </div>
<div class="line"><a id="l00429" name="l00429"></a><span class="lineno">  429</span></div>
<div class="line"><a id="l00436" name="l00436"></a><span class="lineno">  436</span></div>
<div class="line"><a id="l00440" name="l00440"></a><span class="lineno">  440</span><span class="keyword">typedef</span> <span class="keyword">struct</span></div>
<div class="line"><a id="l00441" name="l00441"></a><span class="lineno">  441</span>{</div>
<div class="line"><a id="l00442" name="l00442"></a><span class="lineno">  442</span>  __IM  uint32_t CPUID;                  </div>
<div class="line"><a id="l00443" name="l00443"></a><span class="lineno">  443</span>  __IOM uint32_t ICSR;                   </div>
<div class="line"><a id="l00444" name="l00444"></a><span class="lineno">  444</span>  __IOM uint32_t VTOR;                   </div>
<div class="line"><a id="l00445" name="l00445"></a><span class="lineno">  445</span>  __IOM uint32_t AIRCR;                  </div>
<div class="line"><a id="l00446" name="l00446"></a><span class="lineno">  446</span>  __IOM uint32_t SCR;                    </div>
<div class="line"><a id="l00447" name="l00447"></a><span class="lineno">  447</span>  __IOM uint32_t CCR;                    </div>
<div class="line"><a id="l00448" name="l00448"></a><span class="lineno">  448</span>  __IOM uint8_t  SHP[12U];               </div>
<div class="line"><a id="l00449" name="l00449"></a><span class="lineno">  449</span>  __IOM uint32_t SHCSR;                  </div>
<div class="line"><a id="l00450" name="l00450"></a><span class="lineno">  450</span>  __IOM uint32_t CFSR;                   </div>
<div class="line"><a id="l00451" name="l00451"></a><span class="lineno">  451</span>  __IOM uint32_t HFSR;                   </div>
<div class="line"><a id="l00452" name="l00452"></a><span class="lineno">  452</span>  __IOM uint32_t DFSR;                   </div>
<div class="line"><a id="l00453" name="l00453"></a><span class="lineno">  453</span>  __IOM uint32_t MMFAR;                  </div>
<div class="line"><a id="l00454" name="l00454"></a><span class="lineno">  454</span>  __IOM uint32_t BFAR;                   </div>
<div class="line"><a id="l00455" name="l00455"></a><span class="lineno">  455</span>  __IOM uint32_t AFSR;                   </div>
<div class="line"><a id="l00456" name="l00456"></a><span class="lineno">  456</span>  __IM  uint32_t PFR[2U];                </div>
<div class="line"><a id="l00457" name="l00457"></a><span class="lineno">  457</span>  __IM  uint32_t DFR;                    </div>
<div class="line"><a id="l00458" name="l00458"></a><span class="lineno">  458</span>  __IM  uint32_t ADR;                    </div>
<div class="line"><a id="l00459" name="l00459"></a><span class="lineno">  459</span>  __IM  uint32_t MMFR[4U];               </div>
<div class="line"><a id="l00460" name="l00460"></a><span class="lineno">  460</span>  __IM  uint32_t ISAR[5U];               </div>
<div class="line"><a id="l00461" name="l00461"></a><span class="lineno">  461</span>        uint32_t RESERVED0[5U];</div>
<div class="line"><a id="l00462" name="l00462"></a><span class="lineno">  462</span>  __IOM uint32_t CPACR;                  </div>
<div class="line"><a id="l00463" name="l00463"></a><span class="lineno">  463</span>} <a class="code hl_struct" href="struct_s_c_b___type.html">SCB_Type</a>;</div>
<div class="line"><a id="l00464" name="l00464"></a><span class="lineno">  464</span> </div>
<div class="line"><a id="l00465" name="l00465"></a><span class="lineno">  465</span><span class="comment">/* SCB CPUID Register Definitions */</span></div>
<div class="line"><a id="l00466" name="l00466"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga58686b88f94f789d4e6f429fe1ff58cf">  466</a></span><span class="preprocessor">#define SCB_CPUID_IMPLEMENTER_Pos          24U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00467" name="l00467"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga0932b31faafd47656a03ced75a31d99b">  467</a></span><span class="preprocessor">#define SCB_CPUID_IMPLEMENTER_Msk          (0xFFUL &lt;&lt; SCB_CPUID_IMPLEMENTER_Pos)          </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00468" name="l00468"></a><span class="lineno">  468</span> </div>
<div class="line"><a id="l00469" name="l00469"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga104462bd0815391b4044a70bd15d3a71">  469</a></span><span class="preprocessor">#define SCB_CPUID_VARIANT_Pos              20U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00470" name="l00470"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gad358dfbd04300afc1824329d128b99e8">  470</a></span><span class="preprocessor">#define SCB_CPUID_VARIANT_Msk              (0xFUL &lt;&lt; SCB_CPUID_VARIANT_Pos)               </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00471" name="l00471"></a><span class="lineno">  471</span> </div>
<div class="line"><a id="l00472" name="l00472"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gaf8b3236b08fb8e840efb682645fb0e98">  472</a></span><span class="preprocessor">#define SCB_CPUID_ARCHITECTURE_Pos         16U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00473" name="l00473"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gafae4a1f27a927338ae9dc51a0e146213">  473</a></span><span class="preprocessor">#define SCB_CPUID_ARCHITECTURE_Msk         (0xFUL &lt;&lt; SCB_CPUID_ARCHITECTURE_Pos)          </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00474" name="l00474"></a><span class="lineno">  474</span> </div>
<div class="line"><a id="l00475" name="l00475"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga705f68eaa9afb042ca2407dc4e4629ac">  475</a></span><span class="preprocessor">#define SCB_CPUID_PARTNO_Pos                4U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00476" name="l00476"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga98e581423ca016680c238c469aba546d">  476</a></span><span class="preprocessor">#define SCB_CPUID_PARTNO_Msk               (0xFFFUL &lt;&lt; SCB_CPUID_PARTNO_Pos)              </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00477" name="l00477"></a><span class="lineno">  477</span> </div>
<div class="line"><a id="l00478" name="l00478"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga3c3d9071e574de11fb27ba57034838b1">  478</a></span><span class="preprocessor">#define SCB_CPUID_REVISION_Pos              0U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00479" name="l00479"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga2ec0448b6483f77e7f5d08b4b81d85df">  479</a></span><span class="preprocessor">#define SCB_CPUID_REVISION_Msk             (0xFUL </span><span class="comment">/*&lt;&lt; SCB_CPUID_REVISION_Pos*/</span><span class="preprocessor">)          </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00480" name="l00480"></a><span class="lineno">  480</span> </div>
<div class="line"><a id="l00481" name="l00481"></a><span class="lineno">  481</span><span class="comment">/* SCB Interrupt Control State Register Definitions */</span></div>
<div class="line"><a id="l00482" name="l00482"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga750d4b52624a46d71356db4ea769573b">  482</a></span><span class="preprocessor">#define SCB_ICSR_NMIPENDSET_Pos            31U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00483" name="l00483"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga340e3f79e9c3607dee9f2c048b6b22e8">  483</a></span><span class="preprocessor">#define SCB_ICSR_NMIPENDSET_Msk            (1UL &lt;&lt; SCB_ICSR_NMIPENDSET_Pos)               </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00484" name="l00484"></a><span class="lineno">  484</span> </div>
<div class="line"><a id="l00485" name="l00485"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gab5ded23d2ab1d5ff7cc7ce746205e9fe">  485</a></span><span class="preprocessor">#define SCB_ICSR_PENDSVSET_Pos             28U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00486" name="l00486"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga1e40d93efb402763c8c00ddcc56724ff">  486</a></span><span class="preprocessor">#define SCB_ICSR_PENDSVSET_Msk             (1UL &lt;&lt; SCB_ICSR_PENDSVSET_Pos)                </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00487" name="l00487"></a><span class="lineno">  487</span> </div>
<div class="line"><a id="l00488" name="l00488"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gae218d9022288f89faf57187c4d542ecd">  488</a></span><span class="preprocessor">#define SCB_ICSR_PENDSVCLR_Pos             27U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00489" name="l00489"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga4a901ace381d3c1c74ac82b22fae2e1e">  489</a></span><span class="preprocessor">#define SCB_ICSR_PENDSVCLR_Msk             (1UL &lt;&lt; SCB_ICSR_PENDSVCLR_Pos)                </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00490" name="l00490"></a><span class="lineno">  490</span> </div>
<div class="line"><a id="l00491" name="l00491"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga9dbb3358c6167c9c3f85661b90fb2794">  491</a></span><span class="preprocessor">#define SCB_ICSR_PENDSTSET_Pos             26U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00492" name="l00492"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga7325b61ea0ec323ef2d5c893b112e546">  492</a></span><span class="preprocessor">#define SCB_ICSR_PENDSTSET_Msk             (1UL &lt;&lt; SCB_ICSR_PENDSTSET_Pos)                </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00493" name="l00493"></a><span class="lineno">  493</span> </div>
<div class="line"><a id="l00494" name="l00494"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gadbe25e4b333ece1341beb1a740168fdc">  494</a></span><span class="preprocessor">#define SCB_ICSR_PENDSTCLR_Pos             25U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00495" name="l00495"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gab241827d2a793269d8cd99b9b28c2157">  495</a></span><span class="preprocessor">#define SCB_ICSR_PENDSTCLR_Msk             (1UL &lt;&lt; SCB_ICSR_PENDSTCLR_Pos)                </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00496" name="l00496"></a><span class="lineno">  496</span> </div>
<div class="line"><a id="l00497" name="l00497"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga11cb5b1f9ce167b81f31787a77e575df">  497</a></span><span class="preprocessor">#define SCB_ICSR_ISRPREEMPT_Pos            23U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00498" name="l00498"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gaa966600396290808d596fe96e92ca2b5">  498</a></span><span class="preprocessor">#define SCB_ICSR_ISRPREEMPT_Msk            (1UL &lt;&lt; SCB_ICSR_ISRPREEMPT_Pos)               </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00499" name="l00499"></a><span class="lineno">  499</span> </div>
<div class="line"><a id="l00500" name="l00500"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga10749d92b9b744094b845c2eb46d4319">  500</a></span><span class="preprocessor">#define SCB_ICSR_ISRPENDING_Pos            22U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00501" name="l00501"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga056d74fd538e5d36d3be1f28d399c877">  501</a></span><span class="preprocessor">#define SCB_ICSR_ISRPENDING_Msk            (1UL &lt;&lt; SCB_ICSR_ISRPENDING_Pos)               </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00502" name="l00502"></a><span class="lineno">  502</span> </div>
<div class="line"><a id="l00503" name="l00503"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gada60c92bf88d6fd21a8f49efa4a127b8">  503</a></span><span class="preprocessor">#define SCB_ICSR_VECTPENDING_Pos           12U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00504" name="l00504"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gacb6992e7c7ddc27a370f62878a21ef72">  504</a></span><span class="preprocessor">#define SCB_ICSR_VECTPENDING_Msk           (0x1FFUL &lt;&lt; SCB_ICSR_VECTPENDING_Pos)          </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00505" name="l00505"></a><span class="lineno">  505</span> </div>
<div class="line"><a id="l00506" name="l00506"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga403d154200242629e6d2764bfc12a7ec">  506</a></span><span class="preprocessor">#define SCB_ICSR_RETTOBASE_Pos             11U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00507" name="l00507"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gaca6fc3f79bb550f64fd7df782ed4a5f6">  507</a></span><span class="preprocessor">#define SCB_ICSR_RETTOBASE_Msk             (1UL &lt;&lt; SCB_ICSR_RETTOBASE_Pos)                </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00508" name="l00508"></a><span class="lineno">  508</span> </div>
<div class="line"><a id="l00509" name="l00509"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gae4f602c7c5c895d5fb687b71b0979fc3">  509</a></span><span class="preprocessor">#define SCB_ICSR_VECTACTIVE_Pos             0U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00510" name="l00510"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga5533791a4ecf1b9301c883047b3e8396">  510</a></span><span class="preprocessor">#define SCB_ICSR_VECTACTIVE_Msk            (0x1FFUL </span><span class="comment">/*&lt;&lt; SCB_ICSR_VECTACTIVE_Pos*/</span><span class="preprocessor">)       </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00511" name="l00511"></a><span class="lineno">  511</span> </div>
<div class="line"><a id="l00512" name="l00512"></a><span class="lineno">  512</span><span class="comment">/* SCB Vector Table Offset Register Definitions */</span></div>
<div class="line"><a id="l00513" name="l00513"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gac6a55451ddd38bffcff5a211d29cea78">  513</a></span><span class="preprocessor">#define SCB_VTOR_TBLOFF_Pos                 7U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00514" name="l00514"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga75e395ed74042923e8c93edf50f0996c">  514</a></span><span class="preprocessor">#define SCB_VTOR_TBLOFF_Msk                (0x1FFFFFFUL &lt;&lt; SCB_VTOR_TBLOFF_Pos)           </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00515" name="l00515"></a><span class="lineno">  515</span> </div>
<div class="line"><a id="l00516" name="l00516"></a><span class="lineno">  516</span><span class="comment">/* SCB Application Interrupt and Reset Control Register Definitions */</span></div>
<div class="line"><a id="l00517" name="l00517"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gaaa27c0ba600bf82c3da08c748845b640">  517</a></span><span class="preprocessor">#define SCB_AIRCR_VECTKEY_Pos              16U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00518" name="l00518"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga90c7cf0c490e7ae55f9503a7fda1dd22">  518</a></span><span class="preprocessor">#define SCB_AIRCR_VECTKEY_Msk              (0xFFFFUL &lt;&lt; SCB_AIRCR_VECTKEY_Pos)            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00519" name="l00519"></a><span class="lineno">  519</span> </div>
<div class="line"><a id="l00520" name="l00520"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gaec404750ff5ca07f499a3c06b62051ef">  520</a></span><span class="preprocessor">#define SCB_AIRCR_VECTKEYSTAT_Pos          16U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00521" name="l00521"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gabacedaefeefc73d666bbe59ece904493">  521</a></span><span class="preprocessor">#define SCB_AIRCR_VECTKEYSTAT_Msk          (0xFFFFUL &lt;&lt; SCB_AIRCR_VECTKEYSTAT_Pos)        </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00522" name="l00522"></a><span class="lineno">  522</span> </div>
<div class="line"><a id="l00523" name="l00523"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gad31dec98fbc0d33ace63cb1f1a927923">  523</a></span><span class="preprocessor">#define SCB_AIRCR_ENDIANESS_Pos            15U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00524" name="l00524"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga2f571f93d3d4a6eac9a3040756d3d951">  524</a></span><span class="preprocessor">#define SCB_AIRCR_ENDIANESS_Msk            (1UL &lt;&lt; SCB_AIRCR_ENDIANESS_Pos)               </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00525" name="l00525"></a><span class="lineno">  525</span> </div>
<div class="line"><a id="l00526" name="l00526"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gaca155deccdeca0f2c76b8100d24196c8">  526</a></span><span class="preprocessor">#define SCB_AIRCR_PRIGROUP_Pos              8U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00527" name="l00527"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga8be60fff03f48d0d345868060dc6dae7">  527</a></span><span class="preprocessor">#define SCB_AIRCR_PRIGROUP_Msk             (7UL &lt;&lt; SCB_AIRCR_PRIGROUP_Pos)                </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00528" name="l00528"></a><span class="lineno">  528</span> </div>
<div class="line"><a id="l00529" name="l00529"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gaffb2737eca1eac0fc1c282a76a40953c">  529</a></span><span class="preprocessor">#define SCB_AIRCR_SYSRESETREQ_Pos           2U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00530" name="l00530"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gaae1181119559a5bd36e62afa373fa720">  530</a></span><span class="preprocessor">#define SCB_AIRCR_SYSRESETREQ_Msk          (1UL &lt;&lt; SCB_AIRCR_SYSRESETREQ_Pos)             </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00531" name="l00531"></a><span class="lineno">  531</span> </div>
<div class="line"><a id="l00532" name="l00532"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gaa30a12e892bb696e61626d71359a9029">  532</a></span><span class="preprocessor">#define SCB_AIRCR_VECTCLRACTIVE_Pos         1U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00533" name="l00533"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga212c5ab1c1c82c807d30d2307aa8d218">  533</a></span><span class="preprocessor">#define SCB_AIRCR_VECTCLRACTIVE_Msk        (1UL &lt;&lt; SCB_AIRCR_VECTCLRACTIVE_Pos)           </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00534" name="l00534"></a><span class="lineno">  534</span> </div>
<div class="line"><a id="l00535" name="l00535"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga0d483d9569cd9d1b46ec0d171b1f18d8">  535</a></span><span class="preprocessor">#define SCB_AIRCR_VECTRESET_Pos             0U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00536" name="l00536"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga3006e31968bb9725e7b4ee0784d99f7f">  536</a></span><span class="preprocessor">#define SCB_AIRCR_VECTRESET_Msk            (1UL </span><span class="comment">/*&lt;&lt; SCB_AIRCR_VECTRESET_Pos*/</span><span class="preprocessor">)           </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00537" name="l00537"></a><span class="lineno">  537</span> </div>
<div class="line"><a id="l00538" name="l00538"></a><span class="lineno">  538</span><span class="comment">/* SCB System Control Register Definitions */</span></div>
<div class="line"><a id="l00539" name="l00539"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga3bddcec40aeaf3d3a998446100fa0e44">  539</a></span><span class="preprocessor">#define SCB_SCR_SEVONPEND_Pos               4U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00540" name="l00540"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gafb98656644a14342e467505f69a997c9">  540</a></span><span class="preprocessor">#define SCB_SCR_SEVONPEND_Msk              (1UL &lt;&lt; SCB_SCR_SEVONPEND_Pos)                 </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00541" name="l00541"></a><span class="lineno">  541</span> </div>
<div class="line"><a id="l00542" name="l00542"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gab304f6258ec03bd9a6e7a360515c3cfe">  542</a></span><span class="preprocessor">#define SCB_SCR_SLEEPDEEP_Pos               2U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00543" name="l00543"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga77c06a69c63f4b3f6ec1032e911e18e7">  543</a></span><span class="preprocessor">#define SCB_SCR_SLEEPDEEP_Msk              (1UL &lt;&lt; SCB_SCR_SLEEPDEEP_Pos)                 </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00544" name="l00544"></a><span class="lineno">  544</span> </div>
<div class="line"><a id="l00545" name="l00545"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga3680a15114d7fdc1e25043b881308fe9">  545</a></span><span class="preprocessor">#define SCB_SCR_SLEEPONEXIT_Pos             1U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00546" name="l00546"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga50a243e317b9a70781b02758d45b05ee">  546</a></span><span class="preprocessor">#define SCB_SCR_SLEEPONEXIT_Msk            (1UL &lt;&lt; SCB_SCR_SLEEPONEXIT_Pos)               </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00547" name="l00547"></a><span class="lineno">  547</span> </div>
<div class="line"><a id="l00548" name="l00548"></a><span class="lineno">  548</span><span class="comment">/* SCB Configuration Control Register Definitions */</span></div>
<div class="line"><a id="l00549" name="l00549"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gac2d20a250960a432cc74da59d20e2f86">  549</a></span><span class="preprocessor">#define SCB_CCR_STKALIGN_Pos                9U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00550" name="l00550"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga33cf22d3d46af158a03aad25ddea1bcb">  550</a></span><span class="preprocessor">#define SCB_CCR_STKALIGN_Msk               (1UL &lt;&lt; SCB_CCR_STKALIGN_Pos)                  </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00551" name="l00551"></a><span class="lineno">  551</span> </div>
<div class="line"><a id="l00552" name="l00552"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga4010a4f9e2a745af1b58abe1f791ebbf">  552</a></span><span class="preprocessor">#define SCB_CCR_BFHFNMIGN_Pos               8U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00553" name="l00553"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga89a28cc31cfc7d52d9d7a8fcc69c7eac">  553</a></span><span class="preprocessor">#define SCB_CCR_BFHFNMIGN_Msk              (1UL &lt;&lt; SCB_CCR_BFHFNMIGN_Pos)                 </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00554" name="l00554"></a><span class="lineno">  554</span> </div>
<div class="line"><a id="l00555" name="l00555"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gac8d512998bb8cd9333fb7627ddf59bba">  555</a></span><span class="preprocessor">#define SCB_CCR_DIV_0_TRP_Pos               4U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00556" name="l00556"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gabb9aeac71b3abd8586d0297070f61dcb">  556</a></span><span class="preprocessor">#define SCB_CCR_DIV_0_TRP_Msk              (1UL &lt;&lt; SCB_CCR_DIV_0_TRP_Pos)                 </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00557" name="l00557"></a><span class="lineno">  557</span> </div>
<div class="line"><a id="l00558" name="l00558"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gac4e4928b864ea10fc24dbbc57d976229">  558</a></span><span class="preprocessor">#define SCB_CCR_UNALIGN_TRP_Pos             3U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00559" name="l00559"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga68c96ad594af70c007923979085c99e0">  559</a></span><span class="preprocessor">#define SCB_CCR_UNALIGN_TRP_Msk            (1UL &lt;&lt; SCB_CCR_UNALIGN_TRP_Pos)               </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00560" name="l00560"></a><span class="lineno">  560</span> </div>
<div class="line"><a id="l00561" name="l00561"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga789e41f45f59a8cd455fd59fa7652e5e">  561</a></span><span class="preprocessor">#define SCB_CCR_USERSETMPEND_Pos            1U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00562" name="l00562"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga4cf59b6343ca962c80e1885710da90aa">  562</a></span><span class="preprocessor">#define SCB_CCR_USERSETMPEND_Msk           (1UL &lt;&lt; SCB_CCR_USERSETMPEND_Pos)              </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00563" name="l00563"></a><span class="lineno">  563</span> </div>
<div class="line"><a id="l00564" name="l00564"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gab4615f7deb07386350365b10240a3c83">  564</a></span><span class="preprocessor">#define SCB_CCR_NONBASETHRDENA_Pos          0U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00565" name="l00565"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gafe0f6be81b35d72d0736a0a1e3b4fbb3">  565</a></span><span class="preprocessor">#define SCB_CCR_NONBASETHRDENA_Msk         (1UL </span><span class="comment">/*&lt;&lt; SCB_CCR_NONBASETHRDENA_Pos*/</span><span class="preprocessor">)        </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00566" name="l00566"></a><span class="lineno">  566</span> </div>
<div class="line"><a id="l00567" name="l00567"></a><span class="lineno">  567</span><span class="comment">/* SCB System Handler Control and State Register Definitions */</span></div>
<div class="line"><a id="l00568" name="l00568"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gae71949507636fda388ec11d5c2d30b52">  568</a></span><span class="preprocessor">#define SCB_SHCSR_USGFAULTENA_Pos          18U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00569" name="l00569"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga056fb6be590857bbc029bed48b21dd79">  569</a></span><span class="preprocessor">#define SCB_SHCSR_USGFAULTENA_Msk          (1UL &lt;&lt; SCB_SHCSR_USGFAULTENA_Pos)             </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00570" name="l00570"></a><span class="lineno">  570</span> </div>
<div class="line"><a id="l00571" name="l00571"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga3d32edbe4a5c0335f808cfc19ec7e844">  571</a></span><span class="preprocessor">#define SCB_SHCSR_BUSFAULTENA_Pos          17U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00572" name="l00572"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga43e8cbe619c9980e0d1aacc85d9b9e47">  572</a></span><span class="preprocessor">#define SCB_SHCSR_BUSFAULTENA_Msk          (1UL &lt;&lt; SCB_SHCSR_BUSFAULTENA_Pos)             </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00573" name="l00573"></a><span class="lineno">  573</span> </div>
<div class="line"><a id="l00574" name="l00574"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga685b4564a8760b4506f14ec4307b7251">  574</a></span><span class="preprocessor">#define SCB_SHCSR_MEMFAULTENA_Pos          16U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00575" name="l00575"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gaf084424fa1f69bea36a1c44899d83d17">  575</a></span><span class="preprocessor">#define SCB_SHCSR_MEMFAULTENA_Msk          (1UL &lt;&lt; SCB_SHCSR_MEMFAULTENA_Pos)             </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00576" name="l00576"></a><span class="lineno">  576</span> </div>
<div class="line"><a id="l00577" name="l00577"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga2f93ec9b243f94cdd3e94b8f0bf43641">  577</a></span><span class="preprocessor">#define SCB_SHCSR_SVCALLPENDED_Pos         15U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00578" name="l00578"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga6095a7acfbad66f52822b1392be88652">  578</a></span><span class="preprocessor">#define SCB_SHCSR_SVCALLPENDED_Msk         (1UL &lt;&lt; SCB_SHCSR_SVCALLPENDED_Pos)            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00579" name="l00579"></a><span class="lineno">  579</span> </div>
<div class="line"><a id="l00580" name="l00580"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gaa22551e24a72b65f1e817f7ab462203b">  580</a></span><span class="preprocessor">#define SCB_SHCSR_BUSFAULTPENDED_Pos       14U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00581" name="l00581"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga677c23749c4d348f30fb471d1223e783">  581</a></span><span class="preprocessor">#define SCB_SHCSR_BUSFAULTPENDED_Msk       (1UL &lt;&lt; SCB_SHCSR_BUSFAULTPENDED_Pos)          </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00582" name="l00582"></a><span class="lineno">  582</span> </div>
<div class="line"><a id="l00583" name="l00583"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gaceb60fe2d8a8cb17fcd1c1f6b5aa924f">  583</a></span><span class="preprocessor">#define SCB_SHCSR_MEMFAULTPENDED_Pos       13U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00584" name="l00584"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga9abc6c2e395f9e5af4ce05fc420fb04c">  584</a></span><span class="preprocessor">#define SCB_SHCSR_MEMFAULTPENDED_Msk       (1UL &lt;&lt; SCB_SHCSR_MEMFAULTPENDED_Pos)          </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00585" name="l00585"></a><span class="lineno">  585</span> </div>
<div class="line"><a id="l00586" name="l00586"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga3cf03acf1fdc2edc3b047ddd47ebbf87">  586</a></span><span class="preprocessor">#define SCB_SHCSR_USGFAULTPENDED_Pos       12U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00587" name="l00587"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga122b4f732732010895e438803a29d3cc">  587</a></span><span class="preprocessor">#define SCB_SHCSR_USGFAULTPENDED_Msk       (1UL &lt;&lt; SCB_SHCSR_USGFAULTPENDED_Pos)          </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00588" name="l00588"></a><span class="lineno">  588</span> </div>
<div class="line"><a id="l00589" name="l00589"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gaec9ca3b1213c49e2442373445e1697de">  589</a></span><span class="preprocessor">#define SCB_SHCSR_SYSTICKACT_Pos           11U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00590" name="l00590"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gafef530088dc6d6bfc9f1893d52853684">  590</a></span><span class="preprocessor">#define SCB_SHCSR_SYSTICKACT_Msk           (1UL &lt;&lt; SCB_SHCSR_SYSTICKACT_Pos)              </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00591" name="l00591"></a><span class="lineno">  591</span> </div>
<div class="line"><a id="l00592" name="l00592"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga9b9fa69ce4c5ce7fe0861dbccfb15939">  592</a></span><span class="preprocessor">#define SCB_SHCSR_PENDSVACT_Pos            10U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00593" name="l00593"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gae0e837241a515d4cbadaaae1faa8e039">  593</a></span><span class="preprocessor">#define SCB_SHCSR_PENDSVACT_Msk            (1UL &lt;&lt; SCB_SHCSR_PENDSVACT_Pos)               </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00594" name="l00594"></a><span class="lineno">  594</span> </div>
<div class="line"><a id="l00595" name="l00595"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga8b71cf4c61803752a41c96deb00d26af">  595</a></span><span class="preprocessor">#define SCB_SHCSR_MONITORACT_Pos            8U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00596" name="l00596"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gaad09b4bc36e9bccccc2e110d20b16e1a">  596</a></span><span class="preprocessor">#define SCB_SHCSR_MONITORACT_Msk           (1UL &lt;&lt; SCB_SHCSR_MONITORACT_Pos)              </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00597" name="l00597"></a><span class="lineno">  597</span> </div>
<div class="line"><a id="l00598" name="l00598"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga977f5176be2bc8b123873861b38bc02f">  598</a></span><span class="preprocessor">#define SCB_SHCSR_SVCALLACT_Pos             7U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00599" name="l00599"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga634c0f69a233475289023ae5cb158fdf">  599</a></span><span class="preprocessor">#define SCB_SHCSR_SVCALLACT_Msk            (1UL &lt;&lt; SCB_SHCSR_SVCALLACT_Pos)               </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00600" name="l00600"></a><span class="lineno">  600</span> </div>
<div class="line"><a id="l00601" name="l00601"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gae06f54f5081f01ed3f6824e451ad3656">  601</a></span><span class="preprocessor">#define SCB_SHCSR_USGFAULTACT_Pos           3U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00602" name="l00602"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gab3166103b5a5f7931d0df90949c47dfe">  602</a></span><span class="preprocessor">#define SCB_SHCSR_USGFAULTACT_Msk          (1UL &lt;&lt; SCB_SHCSR_USGFAULTACT_Pos)             </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00603" name="l00603"></a><span class="lineno">  603</span> </div>
<div class="line"><a id="l00604" name="l00604"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gaf272760f2df9ecdd8a5fbbd65c0b767a">  604</a></span><span class="preprocessor">#define SCB_SHCSR_BUSFAULTACT_Pos           1U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00605" name="l00605"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga9d7a8b1054b655ad08d85c3c535d4f73">  605</a></span><span class="preprocessor">#define SCB_SHCSR_BUSFAULTACT_Msk          (1UL &lt;&lt; SCB_SHCSR_BUSFAULTACT_Pos)             </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00606" name="l00606"></a><span class="lineno">  606</span> </div>
<div class="line"><a id="l00607" name="l00607"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga7c856f79a75dcc1d1517b19a67691803">  607</a></span><span class="preprocessor">#define SCB_SHCSR_MEMFAULTACT_Pos           0U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00608" name="l00608"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga9147fd4e1b12394ae26eadf900a023a3">  608</a></span><span class="preprocessor">#define SCB_SHCSR_MEMFAULTACT_Msk          (1UL </span><span class="comment">/*&lt;&lt; SCB_SHCSR_MEMFAULTACT_Pos*/</span><span class="preprocessor">)         </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00609" name="l00609"></a><span class="lineno">  609</span> </div>
<div class="line"><a id="l00610" name="l00610"></a><span class="lineno">  610</span><span class="comment">/* SCB Configurable Fault Status Register Definitions */</span></div>
<div class="line"><a id="l00611" name="l00611"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gac8e4197b295c8560e68e2d71285c7879">  611</a></span><span class="preprocessor">#define SCB_CFSR_USGFAULTSR_Pos            16U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00612" name="l00612"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga565807b1a3f31891f1f967d0fa30d03f">  612</a></span><span class="preprocessor">#define SCB_CFSR_USGFAULTSR_Msk            (0xFFFFUL &lt;&lt; SCB_CFSR_USGFAULTSR_Pos)          </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00613" name="l00613"></a><span class="lineno">  613</span> </div>
<div class="line"><a id="l00614" name="l00614"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga555a24f4f57d199f91d1d1ab7c8c3c8a">  614</a></span><span class="preprocessor">#define SCB_CFSR_BUSFAULTSR_Pos             8U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00615" name="l00615"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga26dc1ddfdc37a6b92597a6f7e498c1d6">  615</a></span><span class="preprocessor">#define SCB_CFSR_BUSFAULTSR_Msk            (0xFFUL &lt;&lt; SCB_CFSR_BUSFAULTSR_Pos)            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00616" name="l00616"></a><span class="lineno">  616</span> </div>
<div class="line"><a id="l00617" name="l00617"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga91f41491cec5b5acca3fbc94efbd799e">  617</a></span><span class="preprocessor">#define SCB_CFSR_MEMFAULTSR_Pos             0U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00618" name="l00618"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gad46716159a3808c9e7da22067d6bec98">  618</a></span><span class="preprocessor">#define SCB_CFSR_MEMFAULTSR_Msk            (0xFFUL </span><span class="comment">/*&lt;&lt; SCB_CFSR_MEMFAULTSR_Pos*/</span><span class="preprocessor">)        </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00619" name="l00619"></a><span class="lineno">  619</span> </div>
<div class="line"><a id="l00620" name="l00620"></a><span class="lineno">  620</span><span class="comment">/* MemManage Fault Status Register (part of SCB Configurable Fault Status Register) */</span></div>
<div class="line"><a id="l00621" name="l00621"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gaf9a595a3a8e0171473d486b490669165">  621</a></span><span class="preprocessor">#define SCB_CFSR_MMARVALID_Pos             (SCB_SHCSR_MEMFAULTACT_Pos + 7U)               </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00622" name="l00622"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga33f17b24b05b0405de908ce185bef5c3">  622</a></span><span class="preprocessor">#define SCB_CFSR_MMARVALID_Msk             (1UL &lt;&lt; SCB_CFSR_MMARVALID_Pos)                </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00623" name="l00623"></a><span class="lineno">  623</span> </div>
<div class="line"><a id="l00624" name="l00624"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga1390a486a538d1bb8e9661b678e88e39">  624</a></span><span class="preprocessor">#define SCB_CFSR_MLSPERR_Pos               (SCB_SHCSR_MEMFAULTACT_Pos + 5U)               </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00625" name="l00625"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gac0602ef4ef443ef6ccb1f24d6886661a">  625</a></span><span class="preprocessor">#define SCB_CFSR_MLSPERR_Msk               (1UL &lt;&lt; SCB_CFSR_MLSPERR_Pos)                  </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00626" name="l00626"></a><span class="lineno">  626</span> </div>
<div class="line"><a id="l00627" name="l00627"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga76517c60f54396e7cf075876e8af7a62">  627</a></span><span class="preprocessor">#define SCB_CFSR_MSTKERR_Pos               (SCB_SHCSR_MEMFAULTACT_Pos + 4U)               </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00628" name="l00628"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga30331822fa13db8ee288173cfbcbbf72">  628</a></span><span class="preprocessor">#define SCB_CFSR_MSTKERR_Msk               (1UL &lt;&lt; SCB_CFSR_MSTKERR_Pos)                  </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00629" name="l00629"></a><span class="lineno">  629</span> </div>
<div class="line"><a id="l00630" name="l00630"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga9e5bd9bcd654e271a3e78c5c0a39444d">  630</a></span><span class="preprocessor">#define SCB_CFSR_MUNSTKERR_Pos             (SCB_SHCSR_MEMFAULTACT_Pos + 3U)               </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00631" name="l00631"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga2d77850270c5ca96e63e456315609876">  631</a></span><span class="preprocessor">#define SCB_CFSR_MUNSTKERR_Msk             (1UL &lt;&lt; SCB_CFSR_MUNSTKERR_Pos)                </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00632" name="l00632"></a><span class="lineno">  632</span> </div>
<div class="line"><a id="l00633" name="l00633"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gaa9c22daf6e72e64259673b55ae095725">  633</a></span><span class="preprocessor">#define SCB_CFSR_DACCVIOL_Pos              (SCB_SHCSR_MEMFAULTACT_Pos + 1U)               </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00634" name="l00634"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gacd585d5b620c175f80dd99aecbe42bcf">  634</a></span><span class="preprocessor">#define SCB_CFSR_DACCVIOL_Msk              (1UL &lt;&lt; SCB_CFSR_DACCVIOL_Pos)                 </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00635" name="l00635"></a><span class="lineno">  635</span> </div>
<div class="line"><a id="l00636" name="l00636"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga964f0465dfaca775e31db26e50f395d5">  636</a></span><span class="preprocessor">#define SCB_CFSR_IACCVIOL_Pos              (SCB_SHCSR_MEMFAULTACT_Pos + 0U)               </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00637" name="l00637"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gac0a8e6525cd6c610f05d99640b40e6b7">  637</a></span><span class="preprocessor">#define SCB_CFSR_IACCVIOL_Msk              (1UL </span><span class="comment">/*&lt;&lt; SCB_CFSR_IACCVIOL_Pos*/</span><span class="preprocessor">)             </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00638" name="l00638"></a><span class="lineno">  638</span> </div>
<div class="line"><a id="l00639" name="l00639"></a><span class="lineno">  639</span><span class="comment">/* BusFault Status Register (part of SCB Configurable Fault Status Register) */</span></div>
<div class="line"><a id="l00640" name="l00640"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga1cdff62f1f5730c14c809fef9009bfbb">  640</a></span><span class="preprocessor">#define SCB_CFSR_BFARVALID_Pos            (SCB_CFSR_BUSFAULTSR_Pos + 7U)                  </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00641" name="l00641"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga56dd2218996bebbf2a38180ae6f9fcf7">  641</a></span><span class="preprocessor">#define SCB_CFSR_BFARVALID_Msk            (1UL &lt;&lt; SCB_CFSR_BFARVALID_Pos)                 </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00642" name="l00642"></a><span class="lineno">  642</span> </div>
<div class="line"><a id="l00643" name="l00643"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gaf9b4a695a4f8d14a17be613423ef30e1">  643</a></span><span class="preprocessor">#define SCB_CFSR_LSPERR_Pos               (SCB_CFSR_BUSFAULTSR_Pos + 5U)                  </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00644" name="l00644"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga8af8c68915f63358325fb4ebc5d7acc1">  644</a></span><span class="preprocessor">#define SCB_CFSR_LSPERR_Msk               (1UL &lt;&lt; SCB_CFSR_LSPERR_Pos)                    </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00645" name="l00645"></a><span class="lineno">  645</span> </div>
<div class="line"><a id="l00646" name="l00646"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga62a8fe875fb6cc28e0e36ddf27d81a8f">  646</a></span><span class="preprocessor">#define SCB_CFSR_STKERR_Pos               (SCB_CFSR_BUSFAULTSR_Pos + 4U)                  </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00647" name="l00647"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga77076fdfa5941327d4d8f0cb99653872">  647</a></span><span class="preprocessor">#define SCB_CFSR_STKERR_Msk               (1UL &lt;&lt; SCB_CFSR_STKERR_Pos)                    </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00648" name="l00648"></a><span class="lineno">  648</span> </div>
<div class="line"><a id="l00649" name="l00649"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga7f70b590d3d8f11145e4ff20f7c9f3e8">  649</a></span><span class="preprocessor">#define SCB_CFSR_UNSTKERR_Pos             (SCB_CFSR_BUSFAULTSR_Pos + 3U)                  </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00650" name="l00650"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga2dfce5c289681884651f92377d09380e">  650</a></span><span class="preprocessor">#define SCB_CFSR_UNSTKERR_Msk             (1UL &lt;&lt; SCB_CFSR_UNSTKERR_Pos)                  </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00651" name="l00651"></a><span class="lineno">  651</span> </div>
<div class="line"><a id="l00652" name="l00652"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gaec426f59eb8d75acd48b32953ac154f5">  652</a></span><span class="preprocessor">#define SCB_CFSR_IMPRECISERR_Pos          (SCB_CFSR_BUSFAULTSR_Pos + 2U)                  </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00653" name="l00653"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga6e6b3b643e1c2e14c96f10b42d59fc64">  653</a></span><span class="preprocessor">#define SCB_CFSR_IMPRECISERR_Msk          (1UL &lt;&lt; SCB_CFSR_IMPRECISERR_Pos)               </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00654" name="l00654"></a><span class="lineno">  654</span> </div>
<div class="line"><a id="l00655" name="l00655"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gaf4744e87d7f6eddbff803977901d6ad0">  655</a></span><span class="preprocessor">#define SCB_CFSR_PRECISERR_Pos            (SCB_CFSR_BUSFAULTSR_Pos + 1U)                  </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00656" name="l00656"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gad8fc0d1f80364470e52d3dcf941f38cc">  656</a></span><span class="preprocessor">#define SCB_CFSR_PRECISERR_Msk            (1UL &lt;&lt; SCB_CFSR_PRECISERR_Pos)                 </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00657" name="l00657"></a><span class="lineno">  657</span> </div>
<div class="line"><a id="l00658" name="l00658"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gad01f4e7c1daa67e2ca8eb4411fd80df4">  658</a></span><span class="preprocessor">#define SCB_CFSR_IBUSERR_Pos              (SCB_CFSR_BUSFAULTSR_Pos + 0U)                  </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00659" name="l00659"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga2a0907c95aabc4b9d77c3e28d14a717f">  659</a></span><span class="preprocessor">#define SCB_CFSR_IBUSERR_Msk              (1UL &lt;&lt; SCB_CFSR_IBUSERR_Pos)                   </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00660" name="l00660"></a><span class="lineno">  660</span> </div>
<div class="line"><a id="l00661" name="l00661"></a><span class="lineno">  661</span><span class="comment">/* UsageFault Status Register (part of SCB Configurable Fault Status Register) */</span></div>
<div class="line"><a id="l00662" name="l00662"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gaa8fc61d57be3e94db000367f521aa1fc">  662</a></span><span class="preprocessor">#define SCB_CFSR_DIVBYZERO_Pos            (SCB_CFSR_USGFAULTSR_Pos + 9U)                  </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00663" name="l00663"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga9d91a0850b4962ad1335b2eadac6777e">  663</a></span><span class="preprocessor">#define SCB_CFSR_DIVBYZERO_Msk            (1UL &lt;&lt; SCB_CFSR_DIVBYZERO_Pos)                 </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00664" name="l00664"></a><span class="lineno">  664</span> </div>
<div class="line"><a id="l00665" name="l00665"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga8836da99a7e569d7a5a79ab4eaa85690">  665</a></span><span class="preprocessor">#define SCB_CFSR_UNALIGNED_Pos            (SCB_CFSR_USGFAULTSR_Pos + 8U)                  </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00666" name="l00666"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gac7d2aa508a08a2cab97aa8683c87d125">  666</a></span><span class="preprocessor">#define SCB_CFSR_UNALIGNED_Msk            (1UL &lt;&lt; SCB_CFSR_UNALIGNED_Pos)                 </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00667" name="l00667"></a><span class="lineno">  667</span> </div>
<div class="line"><a id="l00668" name="l00668"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga769b841a38d4e7b8c5e7e74cf0455754">  668</a></span><span class="preprocessor">#define SCB_CFSR_NOCP_Pos                 (SCB_CFSR_USGFAULTSR_Pos + 3U)                  </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00669" name="l00669"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga6cbafe22a9550ca20427cd7e2f2bed7f">  669</a></span><span class="preprocessor">#define SCB_CFSR_NOCP_Msk                 (1UL &lt;&lt; SCB_CFSR_NOCP_Pos)                      </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00670" name="l00670"></a><span class="lineno">  670</span> </div>
<div class="line"><a id="l00671" name="l00671"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga526d3cebe0e96962941e5e3a729307c2">  671</a></span><span class="preprocessor">#define SCB_CFSR_INVPC_Pos                (SCB_CFSR_USGFAULTSR_Pos + 2U)                  </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00672" name="l00672"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gafd7f0192bfedbde5d313fe7e637f55f1">  672</a></span><span class="preprocessor">#define SCB_CFSR_INVPC_Msk                (1UL &lt;&lt; SCB_CFSR_INVPC_Pos)                     </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00673" name="l00673"></a><span class="lineno">  673</span> </div>
<div class="line"><a id="l00674" name="l00674"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga85ecc14a387d790129e9a3fb1312407a">  674</a></span><span class="preprocessor">#define SCB_CFSR_INVSTATE_Pos             (SCB_CFSR_USGFAULTSR_Pos + 1U)                  </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00675" name="l00675"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga8088a459ac3900a43a54f5cd4252484d">  675</a></span><span class="preprocessor">#define SCB_CFSR_INVSTATE_Msk             (1UL &lt;&lt; SCB_CFSR_INVSTATE_Pos)                  </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00676" name="l00676"></a><span class="lineno">  676</span> </div>
<div class="line"><a id="l00677" name="l00677"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga28219a6a1ae6b6118ffd1682c362c63d">  677</a></span><span class="preprocessor">#define SCB_CFSR_UNDEFINSTR_Pos           (SCB_CFSR_USGFAULTSR_Pos + 0U)                  </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00678" name="l00678"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga96e201c8da2bd76df35e184f31b89f1e">  678</a></span><span class="preprocessor">#define SCB_CFSR_UNDEFINSTR_Msk           (1UL &lt;&lt; SCB_CFSR_UNDEFINSTR_Pos)                </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00679" name="l00679"></a><span class="lineno">  679</span> </div>
<div class="line"><a id="l00680" name="l00680"></a><span class="lineno">  680</span><span class="comment">/* SCB Hard Fault Status Register Definitions */</span></div>
<div class="line"><a id="l00681" name="l00681"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga300c90cfb7b35c82b4d44ad16c757ffb">  681</a></span><span class="preprocessor">#define SCB_HFSR_DEBUGEVT_Pos              31U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00682" name="l00682"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gababd60e94756bb33929d5e6f25d8dba3">  682</a></span><span class="preprocessor">#define SCB_HFSR_DEBUGEVT_Msk              (1UL &lt;&lt; SCB_HFSR_DEBUGEVT_Pos)                 </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00683" name="l00683"></a><span class="lineno">  683</span> </div>
<div class="line"><a id="l00684" name="l00684"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gab361e54183a378474cb419ae2a55d6f4">  684</a></span><span class="preprocessor">#define SCB_HFSR_FORCED_Pos                30U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00685" name="l00685"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga6560d97ed043bc01152a7247bafa3157">  685</a></span><span class="preprocessor">#define SCB_HFSR_FORCED_Msk                (1UL &lt;&lt; SCB_HFSR_FORCED_Pos)                   </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00686" name="l00686"></a><span class="lineno">  686</span> </div>
<div class="line"><a id="l00687" name="l00687"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga77993da8de35adea7bda6a4475f036ab">  687</a></span><span class="preprocessor">#define SCB_HFSR_VECTTBL_Pos                1U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00688" name="l00688"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gaac5e289211d0a63fe879a9691cb9e1a9">  688</a></span><span class="preprocessor">#define SCB_HFSR_VECTTBL_Msk               (1UL &lt;&lt; SCB_HFSR_VECTTBL_Pos)                  </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00689" name="l00689"></a><span class="lineno">  689</span> </div>
<div class="line"><a id="l00690" name="l00690"></a><span class="lineno">  690</span><span class="comment">/* SCB Debug Fault Status Register Definitions */</span></div>
<div class="line"><a id="l00691" name="l00691"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga13f502fb5ac673df9c287488c40b0c1d">  691</a></span><span class="preprocessor">#define SCB_DFSR_EXTERNAL_Pos               4U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00692" name="l00692"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga3cba2ec1f588ce0b10b191d6b0d23399">  692</a></span><span class="preprocessor">#define SCB_DFSR_EXTERNAL_Msk              (1UL &lt;&lt; SCB_DFSR_EXTERNAL_Pos)                 </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00693" name="l00693"></a><span class="lineno">  693</span> </div>
<div class="line"><a id="l00694" name="l00694"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gad02d3eaf062ac184c18a7889c9b6de57">  694</a></span><span class="preprocessor">#define SCB_DFSR_VCATCH_Pos                 3U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00695" name="l00695"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gacbb931575c07b324ec793775b7c44d05">  695</a></span><span class="preprocessor">#define SCB_DFSR_VCATCH_Msk                (1UL &lt;&lt; SCB_DFSR_VCATCH_Pos)                   </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00696" name="l00696"></a><span class="lineno">  696</span> </div>
<div class="line"><a id="l00697" name="l00697"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gaccf82364c6d0ed7206f1084277b7cc61">  697</a></span><span class="preprocessor">#define SCB_DFSR_DWTTRAP_Pos                2U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00698" name="l00698"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga3f7384b8a761704655fd45396a305663">  698</a></span><span class="preprocessor">#define SCB_DFSR_DWTTRAP_Msk               (1UL &lt;&lt; SCB_DFSR_DWTTRAP_Pos)                  </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00699" name="l00699"></a><span class="lineno">  699</span> </div>
<div class="line"><a id="l00700" name="l00700"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gaf28fdce48655f0dcefb383aebf26b050">  700</a></span><span class="preprocessor">#define SCB_DFSR_BKPT_Pos                   1U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00701" name="l00701"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga609edf8f50bc49adb51ae28bcecefe1f">  701</a></span><span class="preprocessor">#define SCB_DFSR_BKPT_Msk                  (1UL &lt;&lt; SCB_DFSR_BKPT_Pos)                     </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00702" name="l00702"></a><span class="lineno">  702</span> </div>
<div class="line"><a id="l00703" name="l00703"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gaef4ec28427f9f88ac70a13ae4e541378">  703</a></span><span class="preprocessor">#define SCB_DFSR_HALTED_Pos                 0U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00704" name="l00704"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga200bcf918d57443b5e29e8ce552e4bdf">  704</a></span><span class="preprocessor">#define SCB_DFSR_HALTED_Msk                (1UL </span><span class="comment">/*&lt;&lt; SCB_DFSR_HALTED_Pos*/</span><span class="preprocessor">)               </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00705" name="l00705"></a><span class="lineno">  705</span></div>
<div class="line"><a id="l00707" name="l00707"></a><span class="lineno">  707</span> </div>
<div class="line"><a id="l00708" name="l00708"></a><span class="lineno">  708</span></div>
<div class="line"><a id="l00715" name="l00715"></a><span class="lineno">  715</span></div>
<div class="line"><a id="l00719" name="l00719"></a><span class="lineno">  719</span><span class="keyword">typedef</span> <span class="keyword">struct</span></div>
<div class="line"><a id="l00720" name="l00720"></a><span class="lineno">  720</span>{</div>
<div class="line"><a id="l00721" name="l00721"></a><span class="lineno">  721</span>        uint32_t RESERVED0[1U];</div>
<div class="line"><a id="l00722" name="l00722"></a><span class="lineno">  722</span>  __IM  uint32_t ICTR;                   </div>
<div class="line"><a id="l00723" name="l00723"></a><span class="lineno">  723</span>  __IOM uint32_t ACTLR;                  </div>
<div class="line"><a id="l00724" name="l00724"></a><span class="lineno">  724</span>} <a class="code hl_struct" href="struct_s_cn_s_c_b___type.html">SCnSCB_Type</a>;</div>
<div class="line"><a id="l00725" name="l00725"></a><span class="lineno">  725</span> </div>
<div class="line"><a id="l00726" name="l00726"></a><span class="lineno">  726</span><span class="comment">/* Interrupt Controller Type Register Definitions */</span></div>
<div class="line"><a id="l00727" name="l00727"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga0777ddf379af50f9ca41d40573bfffc5">  727</a></span><span class="preprocessor">#define SCnSCB_ICTR_INTLINESNUM_Pos         0U                                         </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00728" name="l00728"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga3efa0f5210051464e1034b19fc7b33c7">  728</a></span><span class="preprocessor">#define SCnSCB_ICTR_INTLINESNUM_Msk        (0xFUL </span><span class="comment">/*&lt;&lt; SCnSCB_ICTR_INTLINESNUM_Pos*/</span><span class="preprocessor">)  </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00729" name="l00729"></a><span class="lineno">  729</span> </div>
<div class="line"><a id="l00730" name="l00730"></a><span class="lineno">  730</span><span class="comment">/* Auxiliary Control Register Definitions */</span></div>
<div class="line"><a id="l00731" name="l00731"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___s_cn_s_c_b.html#gaff0b57464c60fea8182b903676f8de49">  731</a></span><span class="preprocessor">#define SCnSCB_ACTLR_DISOOFP_Pos            9U                                         </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00732" name="l00732"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___s_cn_s_c_b.html#ga1ecd6adafa43464d7097b132c19e8640">  732</a></span><span class="preprocessor">#define SCnSCB_ACTLR_DISOOFP_Msk           (1UL &lt;&lt; SCnSCB_ACTLR_DISOOFP_Pos)           </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00733" name="l00733"></a><span class="lineno">  733</span> </div>
<div class="line"><a id="l00734" name="l00734"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___s_cn_s_c_b.html#gaa194809383bc72ecf3416d85709281d7">  734</a></span><span class="preprocessor">#define SCnSCB_ACTLR_DISFPCA_Pos            8U                                         </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00735" name="l00735"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___s_cn_s_c_b.html#ga10d5aa4a196dcde6f476016ece2c1b69">  735</a></span><span class="preprocessor">#define SCnSCB_ACTLR_DISFPCA_Msk           (1UL &lt;&lt; SCnSCB_ACTLR_DISFPCA_Pos)           </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00736" name="l00736"></a><span class="lineno">  736</span> </div>
<div class="line"><a id="l00737" name="l00737"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gaab395870643a0bee78906bb15ca5bd02">  737</a></span><span class="preprocessor">#define SCnSCB_ACTLR_DISFOLD_Pos            2U                                         </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00738" name="l00738"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gaa9dd2d4a2350499188f438d0aa9fd982">  738</a></span><span class="preprocessor">#define SCnSCB_ACTLR_DISFOLD_Msk           (1UL &lt;&lt; SCnSCB_ACTLR_DISFOLD_Pos)           </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00739" name="l00739"></a><span class="lineno">  739</span> </div>
<div class="line"><a id="l00740" name="l00740"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gafa2eb37493c0f8dae77cde81ecf80f77">  740</a></span><span class="preprocessor">#define SCnSCB_ACTLR_DISDEFWBUF_Pos         1U                                         </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00741" name="l00741"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga6cda7b7219232a008ec52cc8e89d5d08">  741</a></span><span class="preprocessor">#define SCnSCB_ACTLR_DISDEFWBUF_Msk        (1UL &lt;&lt; SCnSCB_ACTLR_DISDEFWBUF_Pos)        </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00742" name="l00742"></a><span class="lineno">  742</span> </div>
<div class="line"><a id="l00743" name="l00743"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gaaa3e79f5ead4a32c0ea742b2a9ffc0cd">  743</a></span><span class="preprocessor">#define SCnSCB_ACTLR_DISMCYCINT_Pos         0U                                         </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00744" name="l00744"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga2a2818f0489ad10b6ea2964e899d4cbc">  744</a></span><span class="preprocessor">#define SCnSCB_ACTLR_DISMCYCINT_Msk        (1UL </span><span class="comment">/*&lt;&lt; SCnSCB_ACTLR_DISMCYCINT_Pos*/</span><span class="preprocessor">)    </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00745" name="l00745"></a><span class="lineno">  745</span></div>
<div class="line"><a id="l00747" name="l00747"></a><span class="lineno">  747</span> </div>
<div class="line"><a id="l00748" name="l00748"></a><span class="lineno">  748</span></div>
<div class="line"><a id="l00755" name="l00755"></a><span class="lineno">  755</span></div>
<div class="line"><a id="l00759" name="l00759"></a><span class="lineno">  759</span><span class="keyword">typedef</span> <span class="keyword">struct</span></div>
<div class="line"><a id="l00760" name="l00760"></a><span class="lineno">  760</span>{</div>
<div class="line"><a id="l00761" name="l00761"></a><span class="lineno">  761</span>  __IOM uint32_t CTRL;                   </div>
<div class="line"><a id="l00762" name="l00762"></a><span class="lineno">  762</span>  __IOM uint32_t LOAD;                   </div>
<div class="line"><a id="l00763" name="l00763"></a><span class="lineno">  763</span>  __IOM uint32_t VAL;                    </div>
<div class="line"><a id="l00764" name="l00764"></a><span class="lineno">  764</span>  __IM  uint32_t CALIB;                  </div>
<div class="line"><a id="l00765" name="l00765"></a><span class="lineno">  765</span>} <a class="code hl_struct" href="struct_sys_tick___type.html">SysTick_Type</a>;</div>
<div class="line"><a id="l00766" name="l00766"></a><span class="lineno">  766</span> </div>
<div class="line"><a id="l00767" name="l00767"></a><span class="lineno">  767</span><span class="comment">/* SysTick Control / Status Register Definitions */</span></div>
<div class="line"><a id="l00768" name="l00768"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gadbb65d4a815759649db41df216ed4d60">  768</a></span><span class="preprocessor">#define SysTick_CTRL_COUNTFLAG_Pos         16U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00769" name="l00769"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga1bf3033ecccf200f59baefe15dbb367c">  769</a></span><span class="preprocessor">#define SysTick_CTRL_COUNTFLAG_Msk         (1UL &lt;&lt; SysTick_CTRL_COUNTFLAG_Pos)            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00770" name="l00770"></a><span class="lineno">  770</span> </div>
<div class="line"><a id="l00771" name="l00771"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga24fbc69a5f0b78d67fda2300257baff1">  771</a></span><span class="preprocessor">#define SysTick_CTRL_CLKSOURCE_Pos          2U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00772" name="l00772"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gaa41d06039797423a46596bd313d57373">  772</a></span><span class="preprocessor">#define SysTick_CTRL_CLKSOURCE_Msk         (1UL &lt;&lt; SysTick_CTRL_CLKSOURCE_Pos)            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00773" name="l00773"></a><span class="lineno">  773</span> </div>
<div class="line"><a id="l00774" name="l00774"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga88f45bbb89ce8df3cd2b2613c7b48214">  774</a></span><span class="preprocessor">#define SysTick_CTRL_TICKINT_Pos            1U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00775" name="l00775"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga95bb984266ca764024836a870238a027">  775</a></span><span class="preprocessor">#define SysTick_CTRL_TICKINT_Msk           (1UL &lt;&lt; SysTick_CTRL_TICKINT_Pos)              </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00776" name="l00776"></a><span class="lineno">  776</span> </div>
<div class="line"><a id="l00777" name="l00777"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga0b48cc1e36d92a92e4bf632890314810">  777</a></span><span class="preprocessor">#define SysTick_CTRL_ENABLE_Pos             0U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00778" name="l00778"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga16c9fee0ed0235524bdeb38af328fd1f">  778</a></span><span class="preprocessor">#define SysTick_CTRL_ENABLE_Msk            (1UL </span><span class="comment">/*&lt;&lt; SysTick_CTRL_ENABLE_Pos*/</span><span class="preprocessor">)           </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00779" name="l00779"></a><span class="lineno">  779</span> </div>
<div class="line"><a id="l00780" name="l00780"></a><span class="lineno">  780</span><span class="comment">/* SysTick Reload Register Definitions */</span></div>
<div class="line"><a id="l00781" name="l00781"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gaf44d10df359dc5bf5752b0894ae3bad2">  781</a></span><span class="preprocessor">#define SysTick_LOAD_RELOAD_Pos             0U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00782" name="l00782"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga265912a7962f0e1abd170336e579b1b1">  782</a></span><span class="preprocessor">#define SysTick_LOAD_RELOAD_Msk            (0xFFFFFFUL </span><span class="comment">/*&lt;&lt; SysTick_LOAD_RELOAD_Pos*/</span><span class="preprocessor">)    </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00783" name="l00783"></a><span class="lineno">  783</span> </div>
<div class="line"><a id="l00784" name="l00784"></a><span class="lineno">  784</span><span class="comment">/* SysTick Current Register Definitions */</span></div>
<div class="line"><a id="l00785" name="l00785"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga3208104c3b019b5de35ae8c21d5c34dd">  785</a></span><span class="preprocessor">#define SysTick_VAL_CURRENT_Pos             0U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00786" name="l00786"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gafc77b56d568930b49a2474debc75ab45">  786</a></span><span class="preprocessor">#define SysTick_VAL_CURRENT_Msk            (0xFFFFFFUL </span><span class="comment">/*&lt;&lt; SysTick_VAL_CURRENT_Pos*/</span><span class="preprocessor">)    </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00787" name="l00787"></a><span class="lineno">  787</span> </div>
<div class="line"><a id="l00788" name="l00788"></a><span class="lineno">  788</span><span class="comment">/* SysTick Calibration Register Definitions */</span></div>
<div class="line"><a id="l00789" name="l00789"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga534dbe414e7a46a6ce4c1eca1fbff409">  789</a></span><span class="preprocessor">#define SysTick_CALIB_NOREF_Pos            31U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00790" name="l00790"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga3af0d891fdd99bcc8d8912d37830edb6">  790</a></span><span class="preprocessor">#define SysTick_CALIB_NOREF_Msk            (1UL &lt;&lt; SysTick_CALIB_NOREF_Pos)               </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00791" name="l00791"></a><span class="lineno">  791</span> </div>
<div class="line"><a id="l00792" name="l00792"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gadd0c9cd6641b9f6a0c618e7982954860">  792</a></span><span class="preprocessor">#define SysTick_CALIB_SKEW_Pos             30U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00793" name="l00793"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga8a6a85a87334776f33d77fd147587431">  793</a></span><span class="preprocessor">#define SysTick_CALIB_SKEW_Msk             (1UL &lt;&lt; SysTick_CALIB_SKEW_Pos)                </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00794" name="l00794"></a><span class="lineno">  794</span> </div>
<div class="line"><a id="l00795" name="l00795"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gacae558f6e75a0bed5d826f606d8e695e">  795</a></span><span class="preprocessor">#define SysTick_CALIB_TENMS_Pos             0U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00796" name="l00796"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gaf1e68865c5aece2ad58971225bd3e95e">  796</a></span><span class="preprocessor">#define SysTick_CALIB_TENMS_Msk            (0xFFFFFFUL </span><span class="comment">/*&lt;&lt; SysTick_CALIB_TENMS_Pos*/</span><span class="preprocessor">)    </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00797" name="l00797"></a><span class="lineno">  797</span></div>
<div class="line"><a id="l00799" name="l00799"></a><span class="lineno">  799</span> </div>
<div class="line"><a id="l00800" name="l00800"></a><span class="lineno">  800</span></div>
<div class="line"><a id="l00807" name="l00807"></a><span class="lineno">  807</span></div>
<div class="line"><a id="l00811" name="l00811"></a><span class="lineno">  811</span><span class="keyword">typedef</span> <span class="keyword">struct</span></div>
<div class="line"><a id="l00812" name="l00812"></a><span class="lineno">  812</span>{</div>
<div class="line"><a id="l00813" name="l00813"></a><span class="lineno">  813</span>  __OM  <span class="keyword">union</span></div>
<div class="line"><a id="l00814" name="l00814"></a><span class="lineno">  814</span>  {</div>
<div class="line"><a id="l00815" name="l00815"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s__core___debug_functions.html#ga959fe89501908e94844ce2e085c1c62e">  815</a></span>    __OM  uint8_t    <a class="code hl_variable" href="group___c_m_s_i_s__core___debug_functions.html#ga959fe89501908e94844ce2e085c1c62e">u8</a>;                 </div>
<div class="line"><a id="l00816" name="l00816"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s__core___debug_functions.html#ga00209ce9ee763b476f026ec109c990e5">  816</a></span>    __OM  uint16_t   <a class="code hl_variable" href="group___c_m_s_i_s__core___debug_functions.html#ga00209ce9ee763b476f026ec109c990e5">u16</a>;                </div>
<div class="line"><a id="l00817" name="l00817"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s__core___debug_functions.html#ga24d5439cf8ad454c76986e8e495f8f71">  817</a></span>    __OM  uint32_t   <a class="code hl_variable" href="group___c_m_s_i_s__core___debug_functions.html#ga24d5439cf8ad454c76986e8e495f8f71">u32</a>;                </div>
<div class="line"><a id="l00818" name="l00818"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s__core___debug_functions.html#gad99ea72eb1887ee2983de790cf993395">  818</a></span>  }  PORT [32U];                         </div>
<div class="line"><a id="l00819" name="l00819"></a><span class="lineno">  819</span>        uint32_t RESERVED0[864U];</div>
<div class="line"><a id="l00820" name="l00820"></a><span class="lineno">  820</span>  __IOM uint32_t TER;                    </div>
<div class="line"><a id="l00821" name="l00821"></a><span class="lineno">  821</span>        uint32_t RESERVED1[15U];</div>
<div class="line"><a id="l00822" name="l00822"></a><span class="lineno">  822</span>  __IOM uint32_t TPR;                    </div>
<div class="line"><a id="l00823" name="l00823"></a><span class="lineno">  823</span>        uint32_t RESERVED2[15U];</div>
<div class="line"><a id="l00824" name="l00824"></a><span class="lineno">  824</span>  __IOM uint32_t TCR;                    </div>
<div class="line"><a id="l00825" name="l00825"></a><span class="lineno">  825</span>        uint32_t RESERVED3[32U];</div>
<div class="line"><a id="l00826" name="l00826"></a><span class="lineno">  826</span>        uint32_t RESERVED4[43U];</div>
<div class="line"><a id="l00827" name="l00827"></a><span class="lineno">  827</span>  __OM  uint32_t LAR;                    </div>
<div class="line"><a id="l00828" name="l00828"></a><span class="lineno">  828</span>  __IM  uint32_t LSR;                    </div>
<div class="line"><a id="l00829" name="l00829"></a><span class="lineno">  829</span>        uint32_t RESERVED5[6U];</div>
<div class="line"><a id="l00830" name="l00830"></a><span class="lineno">  830</span>  __IM  uint32_t PID4;                   </div>
<div class="line"><a id="l00831" name="l00831"></a><span class="lineno">  831</span>  __IM  uint32_t PID5;                   </div>
<div class="line"><a id="l00832" name="l00832"></a><span class="lineno">  832</span>  __IM  uint32_t PID6;                   </div>
<div class="line"><a id="l00833" name="l00833"></a><span class="lineno">  833</span>  __IM  uint32_t PID7;                   </div>
<div class="line"><a id="l00834" name="l00834"></a><span class="lineno">  834</span>  __IM  uint32_t PID0;                   </div>
<div class="line"><a id="l00835" name="l00835"></a><span class="lineno">  835</span>  __IM  uint32_t PID1;                   </div>
<div class="line"><a id="l00836" name="l00836"></a><span class="lineno">  836</span>  __IM  uint32_t PID2;                   </div>
<div class="line"><a id="l00837" name="l00837"></a><span class="lineno">  837</span>  __IM  uint32_t PID3;                   </div>
<div class="line"><a id="l00838" name="l00838"></a><span class="lineno">  838</span>  __IM  uint32_t CID0;                   </div>
<div class="line"><a id="l00839" name="l00839"></a><span class="lineno">  839</span>  __IM  uint32_t CID1;                   </div>
<div class="line"><a id="l00840" name="l00840"></a><span class="lineno">  840</span>  __IM  uint32_t CID2;                   </div>
<div class="line"><a id="l00841" name="l00841"></a><span class="lineno">  841</span>  __IM  uint32_t CID3;                   </div>
<div class="line"><a id="l00842" name="l00842"></a><span class="lineno">  842</span>} <a class="code hl_struct" href="struct_i_t_m___type.html">ITM_Type</a>;</div>
<div class="line"><a id="l00843" name="l00843"></a><span class="lineno">  843</span> </div>
<div class="line"><a id="l00844" name="l00844"></a><span class="lineno">  844</span><span class="comment">/* ITM Trace Privilege Register Definitions */</span></div>
<div class="line"><a id="l00845" name="l00845"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga7abe5e590d1611599df87a1884a352e8">  845</a></span><span class="preprocessor">#define ITM_TPR_PRIVMASK_Pos                0U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00846" name="l00846"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga168e089d882df325a387aab3a802a46b">  846</a></span><span class="preprocessor">#define ITM_TPR_PRIVMASK_Msk               (0xFFFFFFFFUL </span><span class="comment">/*&lt;&lt; ITM_TPR_PRIVMASK_Pos*/</span><span class="preprocessor">)     </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00847" name="l00847"></a><span class="lineno">  847</span> </div>
<div class="line"><a id="l00848" name="l00848"></a><span class="lineno">  848</span><span class="comment">/* ITM Trace Control Register Definitions */</span></div>
<div class="line"><a id="l00849" name="l00849"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga9174ad4a36052c377cef4e6aba2ed484">  849</a></span><span class="preprocessor">#define ITM_TCR_BUSY_Pos                   23U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00850" name="l00850"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga43ad7cf33de12f2ef3a412d4f354c60f">  850</a></span><span class="preprocessor">#define ITM_TCR_BUSY_Msk                   (1UL &lt;&lt; ITM_TCR_BUSY_Pos)                      </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00851" name="l00851"></a><span class="lineno">  851</span> </div>
<div class="line"><a id="l00852" name="l00852"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gaca0281de867f33114aac0636f7ce65d3">  852</a></span><span class="preprocessor">#define ITM_TCR_TraceBusID_Pos             16U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00853" name="l00853"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga60c20bd9649d1da5a2be8e656ba19a60">  853</a></span><span class="preprocessor">#define ITM_TCR_TraceBusID_Msk             (0x7FUL &lt;&lt; ITM_TCR_TraceBusID_Pos)             </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00854" name="l00854"></a><span class="lineno">  854</span> </div>
<div class="line"><a id="l00855" name="l00855"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga96c7c7cbc0d98426c408090b41f583f1">  855</a></span><span class="preprocessor">#define ITM_TCR_GTSFREQ_Pos                10U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00856" name="l00856"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gade862cf009827f7f6748fc44c541b067">  856</a></span><span class="preprocessor">#define ITM_TCR_GTSFREQ_Msk                (3UL &lt;&lt; ITM_TCR_GTSFREQ_Pos)                   </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00857" name="l00857"></a><span class="lineno">  857</span> </div>
<div class="line"><a id="l00858" name="l00858"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gad7bc9ee1732032c6e0de035f0978e473">  858</a></span><span class="preprocessor">#define ITM_TCR_TSPrescale_Pos              8U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00859" name="l00859"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga7a723f71bfb0204c264d8dbe8cc7ae52">  859</a></span><span class="preprocessor">#define ITM_TCR_TSPrescale_Msk             (3UL &lt;&lt; ITM_TCR_TSPrescale_Pos)                </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00860" name="l00860"></a><span class="lineno">  860</span> </div>
<div class="line"><a id="l00861" name="l00861"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga7a380f0c8078f6560051406583ecd6a5">  861</a></span><span class="preprocessor">#define ITM_TCR_SWOENA_Pos                  4U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00862" name="l00862"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga97476cb65bab16a328b35f81fd02010a">  862</a></span><span class="preprocessor">#define ITM_TCR_SWOENA_Msk                 (1UL &lt;&lt; ITM_TCR_SWOENA_Pos)                    </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00863" name="l00863"></a><span class="lineno">  863</span> </div>
<div class="line"><a id="l00864" name="l00864"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga30e83ebb33aa766070fe3d1f27ae820e">  864</a></span><span class="preprocessor">#define ITM_TCR_DWTENA_Pos                  3U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00865" name="l00865"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga98ea1c596d43d3633a202f9ee746cf70">  865</a></span><span class="preprocessor">#define ITM_TCR_DWTENA_Msk                 (1UL &lt;&lt; ITM_TCR_DWTENA_Pos)                    </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00866" name="l00866"></a><span class="lineno">  866</span> </div>
<div class="line"><a id="l00867" name="l00867"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gaa93a1147a39fc63980d299231252a30e">  867</a></span><span class="preprocessor">#define ITM_TCR_SYNCENA_Pos                 2U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00868" name="l00868"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gac89b74a78701c25b442105d7fe2bbefb">  868</a></span><span class="preprocessor">#define ITM_TCR_SYNCENA_Msk                (1UL &lt;&lt; ITM_TCR_SYNCENA_Pos)                   </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00869" name="l00869"></a><span class="lineno">  869</span> </div>
<div class="line"><a id="l00870" name="l00870"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga5aa381845f810114ab519b90753922a1">  870</a></span><span class="preprocessor">#define ITM_TCR_TSENA_Pos                   1U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00871" name="l00871"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga436b2e8fa24328f48f2da31c00fc9e65">  871</a></span><span class="preprocessor">#define ITM_TCR_TSENA_Msk                  (1UL &lt;&lt; ITM_TCR_TSENA_Pos)                     </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00872" name="l00872"></a><span class="lineno">  872</span> </div>
<div class="line"><a id="l00873" name="l00873"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga3286b86004bce7ffe17ee269f87f8d9d">  873</a></span><span class="preprocessor">#define ITM_TCR_ITMENA_Pos                  0U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00874" name="l00874"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga7dd53e3bff24ac09d94e61cb595cb2d9">  874</a></span><span class="preprocessor">#define ITM_TCR_ITMENA_Msk                 (1UL </span><span class="comment">/*&lt;&lt; ITM_TCR_ITMENA_Pos*/</span><span class="preprocessor">)                </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00875" name="l00875"></a><span class="lineno">  875</span> </div>
<div class="line"><a id="l00876" name="l00876"></a><span class="lineno">  876</span><span class="comment">/* ITM Lock Status Register Definitions */</span></div>
<div class="line"><a id="l00877" name="l00877"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gabfae3e570edc8759597311ed6dfb478e">  877</a></span><span class="preprocessor">#define ITM_LSR_ByteAcc_Pos                 2U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00878" name="l00878"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga91f492b2891bb8b7eac5b58de7b220f4">  878</a></span><span class="preprocessor">#define ITM_LSR_ByteAcc_Msk                (1UL &lt;&lt; ITM_LSR_ByteAcc_Pos)                   </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00879" name="l00879"></a><span class="lineno">  879</span> </div>
<div class="line"><a id="l00880" name="l00880"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga144a49e12b83ad9809fdd2769094fdc0">  880</a></span><span class="preprocessor">#define ITM_LSR_Access_Pos                  1U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00881" name="l00881"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gac8ae69f11c0311da226c0c8ec40b3d37">  881</a></span><span class="preprocessor">#define ITM_LSR_Access_Msk                 (1UL &lt;&lt; ITM_LSR_Access_Pos)                    </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00882" name="l00882"></a><span class="lineno">  882</span> </div>
<div class="line"><a id="l00883" name="l00883"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gaf5740689cf14564d3f3fd91299b6c88d">  883</a></span><span class="preprocessor">#define ITM_LSR_Present_Pos                 0U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00884" name="l00884"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gaa5bc2a7f5f1d69ff819531f5508bb017">  884</a></span><span class="preprocessor">#define ITM_LSR_Present_Msk                (1UL </span><span class="comment">/*&lt;&lt; ITM_LSR_Present_Pos*/</span><span class="preprocessor">)               </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00885" name="l00885"></a><span class="lineno">  885</span> <span class="comment">/* end of group CMSIS_ITM */</span></div>
<div class="line"><a id="l00887" name="l00887"></a><span class="lineno">  887</span> </div>
<div class="line"><a id="l00888" name="l00888"></a><span class="lineno">  888</span></div>
<div class="line"><a id="l00895" name="l00895"></a><span class="lineno">  895</span></div>
<div class="line"><a id="l00899" name="l00899"></a><span class="lineno">  899</span><span class="keyword">typedef</span> <span class="keyword">struct</span></div>
<div class="line"><a id="l00900" name="l00900"></a><span class="lineno">  900</span>{</div>
<div class="line"><a id="l00901" name="l00901"></a><span class="lineno">  901</span>  __IOM uint32_t CTRL;                   </div>
<div class="line"><a id="l00902" name="l00902"></a><span class="lineno">  902</span>  __IOM uint32_t CYCCNT;                 </div>
<div class="line"><a id="l00903" name="l00903"></a><span class="lineno">  903</span>  __IOM uint32_t CPICNT;                 </div>
<div class="line"><a id="l00904" name="l00904"></a><span class="lineno">  904</span>  __IOM uint32_t EXCCNT;                 </div>
<div class="line"><a id="l00905" name="l00905"></a><span class="lineno">  905</span>  __IOM uint32_t SLEEPCNT;               </div>
<div class="line"><a id="l00906" name="l00906"></a><span class="lineno">  906</span>  __IOM uint32_t LSUCNT;                 </div>
<div class="line"><a id="l00907" name="l00907"></a><span class="lineno">  907</span>  __IOM uint32_t FOLDCNT;                </div>
<div class="line"><a id="l00908" name="l00908"></a><span class="lineno">  908</span>  __IM  uint32_t PCSR;                   </div>
<div class="line"><a id="l00909" name="l00909"></a><span class="lineno">  909</span>  __IOM uint32_t COMP0;                  </div>
<div class="line"><a id="l00910" name="l00910"></a><span class="lineno">  910</span>  __IOM uint32_t MASK0;                  </div>
<div class="line"><a id="l00911" name="l00911"></a><span class="lineno">  911</span>  __IOM uint32_t FUNCTION0;              </div>
<div class="line"><a id="l00912" name="l00912"></a><span class="lineno">  912</span>        uint32_t RESERVED0[1U];</div>
<div class="line"><a id="l00913" name="l00913"></a><span class="lineno">  913</span>  __IOM uint32_t COMP1;                  </div>
<div class="line"><a id="l00914" name="l00914"></a><span class="lineno">  914</span>  __IOM uint32_t MASK1;                  </div>
<div class="line"><a id="l00915" name="l00915"></a><span class="lineno">  915</span>  __IOM uint32_t FUNCTION1;              </div>
<div class="line"><a id="l00916" name="l00916"></a><span class="lineno">  916</span>        uint32_t RESERVED1[1U];</div>
<div class="line"><a id="l00917" name="l00917"></a><span class="lineno">  917</span>  __IOM uint32_t COMP2;                  </div>
<div class="line"><a id="l00918" name="l00918"></a><span class="lineno">  918</span>  __IOM uint32_t MASK2;                  </div>
<div class="line"><a id="l00919" name="l00919"></a><span class="lineno">  919</span>  __IOM uint32_t FUNCTION2;              </div>
<div class="line"><a id="l00920" name="l00920"></a><span class="lineno">  920</span>        uint32_t RESERVED2[1U];</div>
<div class="line"><a id="l00921" name="l00921"></a><span class="lineno">  921</span>  __IOM uint32_t COMP3;                  </div>
<div class="line"><a id="l00922" name="l00922"></a><span class="lineno">  922</span>  __IOM uint32_t MASK3;                  </div>
<div class="line"><a id="l00923" name="l00923"></a><span class="lineno">  923</span>  __IOM uint32_t FUNCTION3;              </div>
<div class="line"><a id="l00924" name="l00924"></a><span class="lineno">  924</span>} <a class="code hl_struct" href="struct_d_w_t___type.html">DWT_Type</a>;</div>
<div class="line"><a id="l00925" name="l00925"></a><span class="lineno">  925</span> </div>
<div class="line"><a id="l00926" name="l00926"></a><span class="lineno">  926</span><span class="comment">/* DWT Control Register Definitions */</span></div>
<div class="line"><a id="l00927" name="l00927"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gaac44b9b7d5391a7ffef129b7f6c84cd7">  927</a></span><span class="preprocessor">#define DWT_CTRL_NUMCOMP_Pos               28U                                         </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00928" name="l00928"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gaa3d37d68c2ba73f2026265584c2815e7">  928</a></span><span class="preprocessor">#define DWT_CTRL_NUMCOMP_Msk               (0xFUL &lt;&lt; DWT_CTRL_NUMCOMP_Pos)             </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00929" name="l00929"></a><span class="lineno">  929</span> </div>
<div class="line"><a id="l00930" name="l00930"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gaa82840323a2628e7f4a2b09b74fa73fd">  930</a></span><span class="preprocessor">#define DWT_CTRL_NOTRCPKT_Pos              27U                                         </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00931" name="l00931"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga04d8bb0a065ca38e2e5f13a97e1f7073">  931</a></span><span class="preprocessor">#define DWT_CTRL_NOTRCPKT_Msk              (0x1UL &lt;&lt; DWT_CTRL_NOTRCPKT_Pos)            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00932" name="l00932"></a><span class="lineno">  932</span> </div>
<div class="line"><a id="l00933" name="l00933"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gad997b9026715d5609b5a3b144eca42d0">  933</a></span><span class="preprocessor">#define DWT_CTRL_NOEXTTRIG_Pos             26U                                         </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00934" name="l00934"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gacc7d15edf7a27147c422099ab475953e">  934</a></span><span class="preprocessor">#define DWT_CTRL_NOEXTTRIG_Msk             (0x1UL &lt;&lt; DWT_CTRL_NOEXTTRIG_Pos)           </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00935" name="l00935"></a><span class="lineno">  935</span> </div>
<div class="line"><a id="l00936" name="l00936"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga337f6167d960f57f12aa382ffecce522">  936</a></span><span class="preprocessor">#define DWT_CTRL_NOCYCCNT_Pos              25U                                         </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00937" name="l00937"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gaf40c8d7a4fd978034c137e90f714c143">  937</a></span><span class="preprocessor">#define DWT_CTRL_NOCYCCNT_Msk              (0x1UL &lt;&lt; DWT_CTRL_NOCYCCNT_Pos)            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00938" name="l00938"></a><span class="lineno">  938</span> </div>
<div class="line"><a id="l00939" name="l00939"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gad52a0e5be84363ab166cc17beca0d048">  939</a></span><span class="preprocessor">#define DWT_CTRL_NOPRFCNT_Pos              24U                                         </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00940" name="l00940"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gafd8448d7db4bc51f27f202e6e1f27823">  940</a></span><span class="preprocessor">#define DWT_CTRL_NOPRFCNT_Msk              (0x1UL &lt;&lt; DWT_CTRL_NOPRFCNT_Pos)            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00941" name="l00941"></a><span class="lineno">  941</span> </div>
<div class="line"><a id="l00942" name="l00942"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga0cb0640aaeb18a626d7823570d5c3cb6">  942</a></span><span class="preprocessor">#define DWT_CTRL_CYCEVTENA_Pos             22U                                         </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00943" name="l00943"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga40554bd81460e39abf08810f45fac1a2">  943</a></span><span class="preprocessor">#define DWT_CTRL_CYCEVTENA_Msk             (0x1UL &lt;&lt; DWT_CTRL_CYCEVTENA_Pos)           </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00944" name="l00944"></a><span class="lineno">  944</span> </div>
<div class="line"><a id="l00945" name="l00945"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga5602b0707f446ce78d88ff2a3a82bfff">  945</a></span><span class="preprocessor">#define DWT_CTRL_FOLDEVTENA_Pos            21U                                         </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00946" name="l00946"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga717e679d775562ae09185a3776b1582f">  946</a></span><span class="preprocessor">#define DWT_CTRL_FOLDEVTENA_Msk            (0x1UL &lt;&lt; DWT_CTRL_FOLDEVTENA_Pos)          </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00947" name="l00947"></a><span class="lineno">  947</span> </div>
<div class="line"><a id="l00948" name="l00948"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gaea5d1ee72188dc1d57b54c60a9f5233e">  948</a></span><span class="preprocessor">#define DWT_CTRL_LSUEVTENA_Pos             20U                                         </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00949" name="l00949"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gac47427f455fbc29d4b6f8a479169f2b2">  949</a></span><span class="preprocessor">#define DWT_CTRL_LSUEVTENA_Msk             (0x1UL &lt;&lt; DWT_CTRL_LSUEVTENA_Pos)           </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00950" name="l00950"></a><span class="lineno">  950</span> </div>
<div class="line"><a id="l00951" name="l00951"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga9c6d62d121164013a8e3ee372f17f3e5">  951</a></span><span class="preprocessor">#define DWT_CTRL_SLEEPEVTENA_Pos           19U                                         </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00952" name="l00952"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga2f431b3734fb840daf5b361034856da9">  952</a></span><span class="preprocessor">#define DWT_CTRL_SLEEPEVTENA_Msk           (0x1UL &lt;&lt; DWT_CTRL_SLEEPEVTENA_Pos)         </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00953" name="l00953"></a><span class="lineno">  953</span> </div>
<div class="line"><a id="l00954" name="l00954"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gaf4e73f548ae3e945ef8b1d9ff1281544">  954</a></span><span class="preprocessor">#define DWT_CTRL_EXCEVTENA_Pos             18U                                         </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00955" name="l00955"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gab7ee0def33423b5859ca4030dff63b58">  955</a></span><span class="preprocessor">#define DWT_CTRL_EXCEVTENA_Msk             (0x1UL &lt;&lt; DWT_CTRL_EXCEVTENA_Pos)           </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00956" name="l00956"></a><span class="lineno">  956</span> </div>
<div class="line"><a id="l00957" name="l00957"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga9fff0b71fb0be1499f5180c6bce1fc8f">  957</a></span><span class="preprocessor">#define DWT_CTRL_CPIEVTENA_Pos             17U                                         </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00958" name="l00958"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga189089c30aade60b983df17ad2412f6f">  958</a></span><span class="preprocessor">#define DWT_CTRL_CPIEVTENA_Msk             (0x1UL &lt;&lt; DWT_CTRL_CPIEVTENA_Pos)           </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00959" name="l00959"></a><span class="lineno">  959</span> </div>
<div class="line"><a id="l00960" name="l00960"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga05f13b547a9a1e63e003ee0bc6446d0d">  960</a></span><span class="preprocessor">#define DWT_CTRL_EXCTRCENA_Pos             16U                                         </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00961" name="l00961"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gaf4fbb509ab3cbb768f16484c660a24c3">  961</a></span><span class="preprocessor">#define DWT_CTRL_EXCTRCENA_Msk             (0x1UL &lt;&lt; DWT_CTRL_EXCTRCENA_Pos)           </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00962" name="l00962"></a><span class="lineno">  962</span> </div>
<div class="line"><a id="l00963" name="l00963"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga1e14afc7790fcb424fcf619e192554c9">  963</a></span><span class="preprocessor">#define DWT_CTRL_PCSAMPLENA_Pos            12U                                         </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00964" name="l00964"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gafdcf1c86f43fbeaf2780ce797c9ef3d6">  964</a></span><span class="preprocessor">#define DWT_CTRL_PCSAMPLENA_Msk            (0x1UL &lt;&lt; DWT_CTRL_PCSAMPLENA_Pos)          </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00965" name="l00965"></a><span class="lineno">  965</span> </div>
<div class="line"><a id="l00966" name="l00966"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga678ef08786edcbef964479217efb9284">  966</a></span><span class="preprocessor">#define DWT_CTRL_SYNCTAP_Pos               10U                                         </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00967" name="l00967"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gaf1e6c3729d56ecadeb6eeff4d225968c">  967</a></span><span class="preprocessor">#define DWT_CTRL_SYNCTAP_Msk               (0x3UL &lt;&lt; DWT_CTRL_SYNCTAP_Pos)             </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00968" name="l00968"></a><span class="lineno">  968</span> </div>
<div class="line"><a id="l00969" name="l00969"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gaf70b80936c7db60bf84fb6dadb8a3559">  969</a></span><span class="preprocessor">#define DWT_CTRL_CYCTAP_Pos                 9U                                         </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00970" name="l00970"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga6c12e2868b8989a69445646698b8c331">  970</a></span><span class="preprocessor">#define DWT_CTRL_CYCTAP_Msk                (0x1UL &lt;&lt; DWT_CTRL_CYCTAP_Pos)              </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00971" name="l00971"></a><span class="lineno">  971</span> </div>
<div class="line"><a id="l00972" name="l00972"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga2868c0b28eb13be930afb819f55f6f25">  972</a></span><span class="preprocessor">#define DWT_CTRL_POSTINIT_Pos               5U                                         </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00973" name="l00973"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gab8cbbee1e1d94d09f9a1f86379a08ee8">  973</a></span><span class="preprocessor">#define DWT_CTRL_POSTINIT_Msk              (0xFUL &lt;&lt; DWT_CTRL_POSTINIT_Pos)            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00974" name="l00974"></a><span class="lineno">  974</span> </div>
<div class="line"><a id="l00975" name="l00975"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga129bc152febfddd67a0c20c6814cba69">  975</a></span><span class="preprocessor">#define DWT_CTRL_POSTPRESET_Pos             1U                                         </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00976" name="l00976"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga11d9e1e2a758fdd2657aa68ce61b9c9d">  976</a></span><span class="preprocessor">#define DWT_CTRL_POSTPRESET_Msk            (0xFUL &lt;&lt; DWT_CTRL_POSTPRESET_Pos)          </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00977" name="l00977"></a><span class="lineno">  977</span> </div>
<div class="line"><a id="l00978" name="l00978"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gaa4509f5f8514a7200be61691f0e01f10">  978</a></span><span class="preprocessor">#define DWT_CTRL_CYCCNTENA_Pos              0U                                         </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00979" name="l00979"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga4a9d209dc2a81ea6bfa0ea21331769d3">  979</a></span><span class="preprocessor">#define DWT_CTRL_CYCCNTENA_Msk             (0x1UL </span><span class="comment">/*&lt;&lt; DWT_CTRL_CYCCNTENA_Pos*/</span><span class="preprocessor">)       </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00980" name="l00980"></a><span class="lineno">  980</span> </div>
<div class="line"><a id="l00981" name="l00981"></a><span class="lineno">  981</span><span class="comment">/* DWT CPI Count Register Definitions */</span></div>
<div class="line"><a id="l00982" name="l00982"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga80e9ad8f6a9e2344af8a3cf989bebe3d">  982</a></span><span class="preprocessor">#define DWT_CPICNT_CPICNT_Pos               0U                                         </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00983" name="l00983"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga76f39e7bca3fa86a4dbf7b8f6adb7217">  983</a></span><span class="preprocessor">#define DWT_CPICNT_CPICNT_Msk              (0xFFUL </span><span class="comment">/*&lt;&lt; DWT_CPICNT_CPICNT_Pos*/</span><span class="preprocessor">)       </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00984" name="l00984"></a><span class="lineno">  984</span> </div>
<div class="line"><a id="l00985" name="l00985"></a><span class="lineno">  985</span><span class="comment">/* DWT Exception Overhead Count Register Definitions */</span></div>
<div class="line"><a id="l00986" name="l00986"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga031c693654030d4cba398b45d2925b1d">  986</a></span><span class="preprocessor">#define DWT_EXCCNT_EXCCNT_Pos               0U                                         </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00987" name="l00987"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga057fa604a107b58a198bbbadb47e69c9">  987</a></span><span class="preprocessor">#define DWT_EXCCNT_EXCCNT_Msk              (0xFFUL </span><span class="comment">/*&lt;&lt; DWT_EXCCNT_EXCCNT_Pos*/</span><span class="preprocessor">)       </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00988" name="l00988"></a><span class="lineno">  988</span> </div>
<div class="line"><a id="l00989" name="l00989"></a><span class="lineno">  989</span><span class="comment">/* DWT Sleep Count Register Definitions */</span></div>
<div class="line"><a id="l00990" name="l00990"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga0371a84a7996dc5852c56afb2676ba1c">  990</a></span><span class="preprocessor">#define DWT_SLEEPCNT_SLEEPCNT_Pos           0U                                         </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00991" name="l00991"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga1e340751d71413fef400a0a1d76cc828">  991</a></span><span class="preprocessor">#define DWT_SLEEPCNT_SLEEPCNT_Msk          (0xFFUL </span><span class="comment">/*&lt;&lt; DWT_SLEEPCNT_SLEEPCNT_Pos*/</span><span class="preprocessor">)   </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00992" name="l00992"></a><span class="lineno">  992</span> </div>
<div class="line"><a id="l00993" name="l00993"></a><span class="lineno">  993</span><span class="comment">/* DWT LSU Count Register Definitions */</span></div>
<div class="line"><a id="l00994" name="l00994"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gab9394c7911b0b4312a096dad91d53a3d">  994</a></span><span class="preprocessor">#define DWT_LSUCNT_LSUCNT_Pos               0U                                         </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00995" name="l00995"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga2186d7fc9317e20bad61336ee2925615">  995</a></span><span class="preprocessor">#define DWT_LSUCNT_LSUCNT_Msk              (0xFFUL </span><span class="comment">/*&lt;&lt; DWT_LSUCNT_LSUCNT_Pos*/</span><span class="preprocessor">)       </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00996" name="l00996"></a><span class="lineno">  996</span> </div>
<div class="line"><a id="l00997" name="l00997"></a><span class="lineno">  997</span><span class="comment">/* DWT Folded-instruction Count Register Definitions */</span></div>
<div class="line"><a id="l00998" name="l00998"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga7f8af5ac12d178ba31a516f6ed141455">  998</a></span><span class="preprocessor">#define DWT_FOLDCNT_FOLDCNT_Pos             0U                                         </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00999" name="l00999"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga9cb73d0342d38b14e41027d3c5c02647">  999</a></span><span class="preprocessor">#define DWT_FOLDCNT_FOLDCNT_Msk            (0xFFUL </span><span class="comment">/*&lt;&lt; DWT_FOLDCNT_FOLDCNT_Pos*/</span><span class="preprocessor">)     </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01000" name="l01000"></a><span class="lineno"> 1000</span> </div>
<div class="line"><a id="l01001" name="l01001"></a><span class="lineno"> 1001</span><span class="comment">/* DWT Comparator Mask Register Definitions */</span></div>
<div class="line"><a id="l01002" name="l01002"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gaf798ae34e2b9280ea64f4d9920cd2e7d"> 1002</a></span><span class="preprocessor">#define DWT_MASK_MASK_Pos                   0U                                         </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01003" name="l01003"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gadd798deb0f1312feab4fb05dcddc229b"> 1003</a></span><span class="preprocessor">#define DWT_MASK_MASK_Msk                  (0x1FUL </span><span class="comment">/*&lt;&lt; DWT_MASK_MASK_Pos*/</span><span class="preprocessor">)           </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01004" name="l01004"></a><span class="lineno"> 1004</span> </div>
<div class="line"><a id="l01005" name="l01005"></a><span class="lineno"> 1005</span><span class="comment">/* DWT Comparator Function Register Definitions */</span></div>
<div class="line"><a id="l01006" name="l01006"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga22c5787493f74a6bacf6ffb103a190ba"> 1006</a></span><span class="preprocessor">#define DWT_FUNCTION_MATCHED_Pos           24U                                         </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01007" name="l01007"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gac8b1a655947490280709037808eec8ac"> 1007</a></span><span class="preprocessor">#define DWT_FUNCTION_MATCHED_Msk           (0x1UL &lt;&lt; DWT_FUNCTION_MATCHED_Pos)         </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01008" name="l01008"></a><span class="lineno"> 1008</span> </div>
<div class="line"><a id="l01009" name="l01009"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga8b75e8ab3ffd5ea2fa762d028dc30e8c"> 1009</a></span><span class="preprocessor">#define DWT_FUNCTION_DATAVADDR1_Pos        16U                                         </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01010" name="l01010"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gafdbf5a8c367befe8661a4f6945c83445"> 1010</a></span><span class="preprocessor">#define DWT_FUNCTION_DATAVADDR1_Msk        (0xFUL &lt;&lt; DWT_FUNCTION_DATAVADDR1_Pos)      </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01011" name="l01011"></a><span class="lineno"> 1011</span> </div>
<div class="line"><a id="l01012" name="l01012"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga9854cd8bf16f7dce0fb196a8029b018e"> 1012</a></span><span class="preprocessor">#define DWT_FUNCTION_DATAVADDR0_Pos        12U                                         </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01013" name="l01013"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gafc5efbe8f9b51e04aecd00c8a4eb50fb"> 1013</a></span><span class="preprocessor">#define DWT_FUNCTION_DATAVADDR0_Msk        (0xFUL &lt;&lt; DWT_FUNCTION_DATAVADDR0_Pos)      </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01014" name="l01014"></a><span class="lineno"> 1014</span> </div>
<div class="line"><a id="l01015" name="l01015"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga0517a186d4d448aa6416440f40fe7a4d"> 1015</a></span><span class="preprocessor">#define DWT_FUNCTION_DATAVSIZE_Pos         10U                                         </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01016" name="l01016"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gaab42cbc1e6084c44d5de70971613ea76"> 1016</a></span><span class="preprocessor">#define DWT_FUNCTION_DATAVSIZE_Msk         (0x3UL &lt;&lt; DWT_FUNCTION_DATAVSIZE_Pos)       </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01017" name="l01017"></a><span class="lineno"> 1017</span> </div>
<div class="line"><a id="l01018" name="l01018"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga89d7c48858b4d4de96cdadfac91856a1"> 1018</a></span><span class="preprocessor">#define DWT_FUNCTION_LNK1ENA_Pos            9U                                         </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01019" name="l01019"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga64bd419260c3337cacf93607d1ad27ac"> 1019</a></span><span class="preprocessor">#define DWT_FUNCTION_LNK1ENA_Msk           (0x1UL &lt;&lt; DWT_FUNCTION_LNK1ENA_Pos)         </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01020" name="l01020"></a><span class="lineno"> 1020</span> </div>
<div class="line"><a id="l01021" name="l01021"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga106f3672cd4be7c7c846e20497ebe5a6"> 1021</a></span><span class="preprocessor">#define DWT_FUNCTION_DATAVMATCH_Pos         8U                                         </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01022" name="l01022"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga32af1f1c0fcd2d8d9afd1ad79cd9970e"> 1022</a></span><span class="preprocessor">#define DWT_FUNCTION_DATAVMATCH_Msk        (0x1UL &lt;&lt; DWT_FUNCTION_DATAVMATCH_Pos)      </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01023" name="l01023"></a><span class="lineno"> 1023</span> </div>
<div class="line"><a id="l01024" name="l01024"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga4b65d79ca37ae8010b4a726312413efd"> 1024</a></span><span class="preprocessor">#define DWT_FUNCTION_CYCMATCH_Pos           7U                                         </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01025" name="l01025"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga8e2ed09bdd33a8f7f7ce0444f5f3bb25"> 1025</a></span><span class="preprocessor">#define DWT_FUNCTION_CYCMATCH_Msk          (0x1UL &lt;&lt; DWT_FUNCTION_CYCMATCH_Pos)        </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01026" name="l01026"></a><span class="lineno"> 1026</span> </div>
<div class="line"><a id="l01027" name="l01027"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga41d5b332216baa8d29561260a1b85659"> 1027</a></span><span class="preprocessor">#define DWT_FUNCTION_EMITRANGE_Pos          5U                                         </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01028" name="l01028"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gad46dd5aba29f2e28d4d3f50b1d291f41"> 1028</a></span><span class="preprocessor">#define DWT_FUNCTION_EMITRANGE_Msk         (0x1UL &lt;&lt; DWT_FUNCTION_EMITRANGE_Pos)       </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01029" name="l01029"></a><span class="lineno"> 1029</span> </div>
<div class="line"><a id="l01030" name="l01030"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga5797b556edde2bbaa4d33dcdb1a891bb"> 1030</a></span><span class="preprocessor">#define DWT_FUNCTION_FUNCTION_Pos           0U                                         </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01031" name="l01031"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga3b2cda708755ecf5f921d08b25d774d1"> 1031</a></span><span class="preprocessor">#define DWT_FUNCTION_FUNCTION_Msk          (0xFUL </span><span class="comment">/*&lt;&lt; DWT_FUNCTION_FUNCTION_Pos*/</span><span class="preprocessor">)    </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01032" name="l01032"></a><span class="lineno"> 1032</span> <span class="comment">/* end of group CMSIS_DWT */</span></div>
<div class="line"><a id="l01034" name="l01034"></a><span class="lineno"> 1034</span> </div>
<div class="line"><a id="l01035" name="l01035"></a><span class="lineno"> 1035</span></div>
<div class="line"><a id="l01042" name="l01042"></a><span class="lineno"> 1042</span></div>
<div class="line"><a id="l01046" name="l01046"></a><span class="lineno"> 1046</span><span class="keyword">typedef</span> <span class="keyword">struct</span></div>
<div class="line"><a id="l01047" name="l01047"></a><span class="lineno"> 1047</span>{</div>
<div class="line"><a id="l01048" name="l01048"></a><span class="lineno"> 1048</span>  __IM  uint32_t SSPSR;                  </div>
<div class="line"><a id="l01049" name="l01049"></a><span class="lineno"> 1049</span>  __IOM uint32_t CSPSR;                  </div>
<div class="line"><a id="l01050" name="l01050"></a><span class="lineno"> 1050</span>        uint32_t RESERVED0[2U];</div>
<div class="line"><a id="l01051" name="l01051"></a><span class="lineno"> 1051</span>  __IOM uint32_t ACPR;                   </div>
<div class="line"><a id="l01052" name="l01052"></a><span class="lineno"> 1052</span>        uint32_t RESERVED1[55U];</div>
<div class="line"><a id="l01053" name="l01053"></a><span class="lineno"> 1053</span>  __IOM uint32_t SPPR;                   </div>
<div class="line"><a id="l01054" name="l01054"></a><span class="lineno"> 1054</span>        uint32_t RESERVED2[131U];</div>
<div class="line"><a id="l01055" name="l01055"></a><span class="lineno"> 1055</span>  __IM  uint32_t FFSR;                   </div>
<div class="line"><a id="l01056" name="l01056"></a><span class="lineno"> 1056</span>  __IOM uint32_t FFCR;                   </div>
<div class="line"><a id="l01057" name="l01057"></a><span class="lineno"> 1057</span>  __IM  uint32_t FSCR;                   </div>
<div class="line"><a id="l01058" name="l01058"></a><span class="lineno"> 1058</span>        uint32_t RESERVED3[759U];</div>
<div class="line"><a id="l01059" name="l01059"></a><span class="lineno"> 1059</span>  __IM  uint32_t TRIGGER;                </div>
<div class="line"><a id="l01060" name="l01060"></a><span class="lineno"> 1060</span>  __IM  uint32_t FIFO0;                  </div>
<div class="line"><a id="l01061" name="l01061"></a><span class="lineno"> 1061</span>  __IM  uint32_t ITATBCTR2;              </div>
<div class="line"><a id="l01062" name="l01062"></a><span class="lineno"> 1062</span>        uint32_t RESERVED4[1U];</div>
<div class="line"><a id="l01063" name="l01063"></a><span class="lineno"> 1063</span>  __IM  uint32_t ITATBCTR0;              </div>
<div class="line"><a id="l01064" name="l01064"></a><span class="lineno"> 1064</span>  __IM  uint32_t FIFO1;                  </div>
<div class="line"><a id="l01065" name="l01065"></a><span class="lineno"> 1065</span>  __IOM uint32_t ITCTRL;                 </div>
<div class="line"><a id="l01066" name="l01066"></a><span class="lineno"> 1066</span>        uint32_t RESERVED5[39U];</div>
<div class="line"><a id="l01067" name="l01067"></a><span class="lineno"> 1067</span>  __IOM uint32_t CLAIMSET;               </div>
<div class="line"><a id="l01068" name="l01068"></a><span class="lineno"> 1068</span>  __IOM uint32_t CLAIMCLR;               </div>
<div class="line"><a id="l01069" name="l01069"></a><span class="lineno"> 1069</span>        uint32_t RESERVED7[8U];</div>
<div class="line"><a id="l01070" name="l01070"></a><span class="lineno"> 1070</span>  __IM  uint32_t DEVID;                  </div>
<div class="line"><a id="l01071" name="l01071"></a><span class="lineno"> 1071</span>  __IM  uint32_t DEVTYPE;                </div>
<div class="line"><a id="l01072" name="l01072"></a><span class="lineno"> 1072</span>} <a class="code hl_struct" href="struct_t_p_i___type.html">TPI_Type</a>;</div>
<div class="line"><a id="l01073" name="l01073"></a><span class="lineno"> 1073</span> </div>
<div class="line"><a id="l01074" name="l01074"></a><span class="lineno"> 1074</span><span class="comment">/* TPI Asynchronous Clock Prescaler Register Definitions */</span></div>
<div class="line"><a id="l01075" name="l01075"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga5a82d274eb2df8b0c92dd4ed63535928"> 1075</a></span><span class="preprocessor">#define TPI_ACPR_PRESCALER_Pos              0U                                         </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01076" name="l01076"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga4fcacd27208419929921aec8457a8c13"> 1076</a></span><span class="preprocessor">#define TPI_ACPR_PRESCALER_Msk             (0x1FFFUL </span><span class="comment">/*&lt;&lt; TPI_ACPR_PRESCALER_Pos*/</span><span class="preprocessor">)    </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01077" name="l01077"></a><span class="lineno"> 1077</span> </div>
<div class="line"><a id="l01078" name="l01078"></a><span class="lineno"> 1078</span><span class="comment">/* TPI Selected Pin Protocol Register Definitions */</span></div>
<div class="line"><a id="l01079" name="l01079"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga0f302797b94bb2da24052082ab630858"> 1079</a></span><span class="preprocessor">#define TPI_SPPR_TXMODE_Pos                 0U                                         </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01080" name="l01080"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gaca085c8a954393d70dbd7240bb02cc1f"> 1080</a></span><span class="preprocessor">#define TPI_SPPR_TXMODE_Msk                (0x3UL </span><span class="comment">/*&lt;&lt; TPI_SPPR_TXMODE_Pos*/</span><span class="preprocessor">)          </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01081" name="l01081"></a><span class="lineno"> 1081</span> </div>
<div class="line"><a id="l01082" name="l01082"></a><span class="lineno"> 1082</span><span class="comment">/* TPI Formatter and Flush Status Register Definitions */</span></div>
<div class="line"><a id="l01083" name="l01083"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga9537b8a660cc8803f57cbbee320b2fc8"> 1083</a></span><span class="preprocessor">#define TPI_FFSR_FtNonStop_Pos              3U                                         </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01084" name="l01084"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gaaa313f980974a8cfc7dac68c4d805ab1"> 1084</a></span><span class="preprocessor">#define TPI_FFSR_FtNonStop_Msk             (0x1UL &lt;&lt; TPI_FFSR_FtNonStop_Pos)           </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01085" name="l01085"></a><span class="lineno"> 1085</span> </div>
<div class="line"><a id="l01086" name="l01086"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gad30fde0c058da2ffb2b0a213be7a1b5c"> 1086</a></span><span class="preprocessor">#define TPI_FFSR_TCPresent_Pos              2U                                         </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01087" name="l01087"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga0d6bfd263ff2fdec72d6ec9415fb1135"> 1087</a></span><span class="preprocessor">#define TPI_FFSR_TCPresent_Msk             (0x1UL &lt;&lt; TPI_FFSR_TCPresent_Pos)           </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01088" name="l01088"></a><span class="lineno"> 1088</span> </div>
<div class="line"><a id="l01089" name="l01089"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gaedf31fd453a878021b542b644e2869d2"> 1089</a></span><span class="preprocessor">#define TPI_FFSR_FtStopped_Pos              1U                                         </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01090" name="l01090"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga1ab6c3abe1cf6311ee07e7c479ce5f78"> 1090</a></span><span class="preprocessor">#define TPI_FFSR_FtStopped_Msk             (0x1UL &lt;&lt; TPI_FFSR_FtStopped_Pos)           </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01091" name="l01091"></a><span class="lineno"> 1091</span> </div>
<div class="line"><a id="l01092" name="l01092"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga542ca74a081588273e6d5275ba5da6bf"> 1092</a></span><span class="preprocessor">#define TPI_FFSR_FlInProg_Pos               0U                                         </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01093" name="l01093"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga63dfb09259893958962914fc3a9e3824"> 1093</a></span><span class="preprocessor">#define TPI_FFSR_FlInProg_Msk              (0x1UL </span><span class="comment">/*&lt;&lt; TPI_FFSR_FlInProg_Pos*/</span><span class="preprocessor">)        </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01094" name="l01094"></a><span class="lineno"> 1094</span> </div>
<div class="line"><a id="l01095" name="l01095"></a><span class="lineno"> 1095</span><span class="comment">/* TPI Formatter and Flush Control Register Definitions */</span></div>
<div class="line"><a id="l01096" name="l01096"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gaa7ea11ba6ea75b541cd82e185c725b5b"> 1096</a></span><span class="preprocessor">#define TPI_FFCR_TrigIn_Pos                 8U                                         </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01097" name="l01097"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga360b413bc5da61f751546a7133c3e4dd"> 1097</a></span><span class="preprocessor">#define TPI_FFCR_TrigIn_Msk                (0x1UL &lt;&lt; TPI_FFCR_TrigIn_Pos)              </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01098" name="l01098"></a><span class="lineno"> 1098</span> </div>
<div class="line"><a id="l01099" name="l01099"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga99e58a0960b275a773b245e2b69b9a64"> 1099</a></span><span class="preprocessor">#define TPI_FFCR_EnFCont_Pos                1U                                         </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01100" name="l01100"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga27d1ecf2e0ff496df03457a2a97cb2c9"> 1100</a></span><span class="preprocessor">#define TPI_FFCR_EnFCont_Msk               (0x1UL &lt;&lt; TPI_FFCR_EnFCont_Pos)             </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01101" name="l01101"></a><span class="lineno"> 1101</span> </div>
<div class="line"><a id="l01102" name="l01102"></a><span class="lineno"> 1102</span><span class="comment">/* TPI TRIGGER Register Definitions */</span></div>
<div class="line"><a id="l01103" name="l01103"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga5517fa2ced64efbbd413720329c50b99"> 1103</a></span><span class="preprocessor">#define TPI_TRIGGER_TRIGGER_Pos             0U                                         </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01104" name="l01104"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga814227af2b2665a0687bb49345e21110"> 1104</a></span><span class="preprocessor">#define TPI_TRIGGER_TRIGGER_Msk            (0x1UL </span><span class="comment">/*&lt;&lt; TPI_TRIGGER_TRIGGER_Pos*/</span><span class="preprocessor">)      </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01105" name="l01105"></a><span class="lineno"> 1105</span> </div>
<div class="line"><a id="l01106" name="l01106"></a><span class="lineno"> 1106</span><span class="comment">/* TPI Integration ETM Data Register Definitions (FIFO0) */</span></div>
<div class="line"><a id="l01107" name="l01107"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gaa7e050e9eb6528241ebc6835783b6bae"> 1107</a></span><span class="preprocessor">#define TPI_FIFO0_ITM_ATVALID_Pos          29U                                         </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01108" name="l01108"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga94cb2493ed35d2dab7bd4092b88a05bc"> 1108</a></span><span class="preprocessor">#define TPI_FIFO0_ITM_ATVALID_Msk          (0x1UL &lt;&lt; TPI_FIFO0_ITM_ATVALID_Pos)        </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01109" name="l01109"></a><span class="lineno"> 1109</span> </div>
<div class="line"><a id="l01110" name="l01110"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gac2b6f7f13a2fa0be4aa7645a47dcac52"> 1110</a></span><span class="preprocessor">#define TPI_FIFO0_ITM_bytecount_Pos        27U                                         </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01111" name="l01111"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga07bafa971b8daf0d63b3f92b9ae7fa16"> 1111</a></span><span class="preprocessor">#define TPI_FIFO0_ITM_bytecount_Msk        (0x3UL &lt;&lt; TPI_FIFO0_ITM_bytecount_Pos)      </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01112" name="l01112"></a><span class="lineno"> 1112</span> </div>
<div class="line"><a id="l01113" name="l01113"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga7fdeb3e465ca4aa9e3b2f424ab3bbd1d"> 1113</a></span><span class="preprocessor">#define TPI_FIFO0_ETM_ATVALID_Pos          26U                                         </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01114" name="l01114"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga4f0005dc420b28f2369179a935b9a9d3"> 1114</a></span><span class="preprocessor">#define TPI_FIFO0_ETM_ATVALID_Msk          (0x1UL &lt;&lt; TPI_FIFO0_ETM_ATVALID_Pos)        </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01115" name="l01115"></a><span class="lineno"> 1115</span> </div>
<div class="line"><a id="l01116" name="l01116"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga2f738e45386ebf58c4d406f578e7ddaf"> 1116</a></span><span class="preprocessor">#define TPI_FIFO0_ETM_bytecount_Pos        24U                                         </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01117" name="l01117"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gad2536b3a935361c68453cd068640af92"> 1117</a></span><span class="preprocessor">#define TPI_FIFO0_ETM_bytecount_Msk        (0x3UL &lt;&lt; TPI_FIFO0_ETM_bytecount_Pos)      </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01118" name="l01118"></a><span class="lineno"> 1118</span> </div>
<div class="line"><a id="l01119" name="l01119"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga5f0037cc80c65e86d9e94e5005077a48"> 1119</a></span><span class="preprocessor">#define TPI_FIFO0_ETM2_Pos                 16U                                         </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01120" name="l01120"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gaa82a7b9b99c990fb12eafb3c84b68254"> 1120</a></span><span class="preprocessor">#define TPI_FIFO0_ETM2_Msk                 (0xFFUL &lt;&lt; TPI_FIFO0_ETM2_Pos)              </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01121" name="l01121"></a><span class="lineno"> 1121</span> </div>
<div class="line"><a id="l01122" name="l01122"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gac5a2ef4b7f811d1f3d81ec919d794413"> 1122</a></span><span class="preprocessor">#define TPI_FIFO0_ETM1_Pos                  8U                                         </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01123" name="l01123"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gaad9c1a6ed34a70905005a0cc14d5f01b"> 1123</a></span><span class="preprocessor">#define TPI_FIFO0_ETM1_Msk                 (0xFFUL &lt;&lt; TPI_FIFO0_ETM1_Pos)              </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01124" name="l01124"></a><span class="lineno"> 1124</span> </div>
<div class="line"><a id="l01125" name="l01125"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga48783ce3c695d8c06b1352a526110a87"> 1125</a></span><span class="preprocessor">#define TPI_FIFO0_ETM0_Pos                  0U                                         </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01126" name="l01126"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gaf924f7d1662f3f6c1da12052390cb118"> 1126</a></span><span class="preprocessor">#define TPI_FIFO0_ETM0_Msk                 (0xFFUL </span><span class="comment">/*&lt;&lt; TPI_FIFO0_ETM0_Pos*/</span><span class="preprocessor">)          </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01127" name="l01127"></a><span class="lineno"> 1127</span> </div>
<div class="line"><a id="l01128" name="l01128"></a><span class="lineno"> 1128</span><span class="comment">/* TPI ITATBCTR2 Register Definitions */</span></div>
<div class="line"><a id="l01129" name="l01129"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga36b77b6a6a9808dec534802232ffcaa4"> 1129</a></span><span class="preprocessor">#define TPI_ITATBCTR2_ATREADY2_Pos          0U                                         </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01130" name="l01130"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gaef520d45da3808f8ffde92b915cd6c7c"> 1130</a></span><span class="preprocessor">#define TPI_ITATBCTR2_ATREADY2_Msk         (0x1UL </span><span class="comment">/*&lt;&lt; TPI_ITATBCTR2_ATREADY2_Pos*/</span><span class="preprocessor">)   </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01131" name="l01131"></a><span class="lineno"> 1131</span> </div>
<div class="line"><a id="l01132" name="l01132"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gae0edc53203a2373fef7734be91e6125a"> 1132</a></span><span class="preprocessor">#define TPI_ITATBCTR2_ATREADY1_Pos          0U                                         </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01133" name="l01133"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga32573fb2508a35660ab785a85c5b38a7"> 1133</a></span><span class="preprocessor">#define TPI_ITATBCTR2_ATREADY1_Msk         (0x1UL </span><span class="comment">/*&lt;&lt; TPI_ITATBCTR2_ATREADY1_Pos*/</span><span class="preprocessor">)   </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01134" name="l01134"></a><span class="lineno"> 1134</span> </div>
<div class="line"><a id="l01135" name="l01135"></a><span class="lineno"> 1135</span><span class="comment">/* TPI Integration ITM Data Register Definitions (FIFO1) */</span></div>
<div class="line"><a id="l01136" name="l01136"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga08edfc862b2c8c415854cc4ae2067dfb"> 1136</a></span><span class="preprocessor">#define TPI_FIFO1_ITM_ATVALID_Pos          29U                                         </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01137" name="l01137"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gabc1f6a3b6cac0099d7c01ca949b4dd08"> 1137</a></span><span class="preprocessor">#define TPI_FIFO1_ITM_ATVALID_Msk          (0x1UL &lt;&lt; TPI_FIFO1_ITM_ATVALID_Pos)        </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01138" name="l01138"></a><span class="lineno"> 1138</span> </div>
<div class="line"><a id="l01139" name="l01139"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gaa22ebf7c86e4f4b2c98cfd0b5981375a"> 1139</a></span><span class="preprocessor">#define TPI_FIFO1_ITM_bytecount_Pos        27U                                         </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01140" name="l01140"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gacba2edfc0499828019550141356b0dcb"> 1140</a></span><span class="preprocessor">#define TPI_FIFO1_ITM_bytecount_Msk        (0x3UL &lt;&lt; TPI_FIFO1_ITM_bytecount_Pos)      </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01141" name="l01141"></a><span class="lineno"> 1141</span> </div>
<div class="line"><a id="l01142" name="l01142"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga3177b8d815cf4a707a2d3d3d5499315d"> 1142</a></span><span class="preprocessor">#define TPI_FIFO1_ETM_ATVALID_Pos          26U                                         </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01143" name="l01143"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga0e8f29a1e9378d1ceb0708035edbb86d"> 1143</a></span><span class="preprocessor">#define TPI_FIFO1_ETM_ATVALID_Msk          (0x1UL &lt;&lt; TPI_FIFO1_ETM_ATVALID_Pos)        </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01144" name="l01144"></a><span class="lineno"> 1144</span> </div>
<div class="line"><a id="l01145" name="l01145"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gaab31238152b5691af633a7475eaf1f06"> 1145</a></span><span class="preprocessor">#define TPI_FIFO1_ETM_bytecount_Pos        24U                                         </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01146" name="l01146"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gab554305459953b80554fdb1908b73291"> 1146</a></span><span class="preprocessor">#define TPI_FIFO1_ETM_bytecount_Msk        (0x3UL &lt;&lt; TPI_FIFO1_ETM_bytecount_Pos)      </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01147" name="l01147"></a><span class="lineno"> 1147</span> </div>
<div class="line"><a id="l01148" name="l01148"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga1828c228f3940005f48fb8dd88ada35b"> 1148</a></span><span class="preprocessor">#define TPI_FIFO1_ITM2_Pos                 16U                                         </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01149" name="l01149"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gae54512f926ebc00f2e056232aa21d335"> 1149</a></span><span class="preprocessor">#define TPI_FIFO1_ITM2_Msk                 (0xFFUL &lt;&lt; TPI_FIFO1_ITM2_Pos)              </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01150" name="l01150"></a><span class="lineno"> 1150</span> </div>
<div class="line"><a id="l01151" name="l01151"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gaece86ab513bc3d0e0a9dbd82258af49f"> 1151</a></span><span class="preprocessor">#define TPI_FIFO1_ITM1_Pos                  8U                                         </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01152" name="l01152"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga3347f42828920dfe56e3130ad319a9e6"> 1152</a></span><span class="preprocessor">#define TPI_FIFO1_ITM1_Msk                 (0xFFUL &lt;&lt; TPI_FIFO1_ITM1_Pos)              </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01153" name="l01153"></a><span class="lineno"> 1153</span> </div>
<div class="line"><a id="l01154" name="l01154"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga2188671488417a52abb075bcd4d73440"> 1154</a></span><span class="preprocessor">#define TPI_FIFO1_ITM0_Pos                  0U                                         </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01155" name="l01155"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga8ae09f544fc1a428797e2a150f14a4c9"> 1155</a></span><span class="preprocessor">#define TPI_FIFO1_ITM0_Msk                 (0xFFUL </span><span class="comment">/*&lt;&lt; TPI_FIFO1_ITM0_Pos*/</span><span class="preprocessor">)          </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01156" name="l01156"></a><span class="lineno"> 1156</span> </div>
<div class="line"><a id="l01157" name="l01157"></a><span class="lineno"> 1157</span><span class="comment">/* TPI ITATBCTR0 Register Definitions */</span></div>
<div class="line"><a id="l01158" name="l01158"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga3f0249dfcfd58090c08fd4a0adea6b22"> 1158</a></span><span class="preprocessor">#define TPI_ITATBCTR0_ATREADY2_Pos          0U                                         </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01159" name="l01159"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gaf985067de6e6e68fbbd2350646b9125e"> 1159</a></span><span class="preprocessor">#define TPI_ITATBCTR0_ATREADY2_Msk         (0x1UL </span><span class="comment">/*&lt;&lt; TPI_ITATBCTR0_ATREADY2_Pos*/</span><span class="preprocessor">)   </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01160" name="l01160"></a><span class="lineno"> 1160</span> </div>
<div class="line"><a id="l01161" name="l01161"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gaded82241155665db59493d912d44c65c"> 1161</a></span><span class="preprocessor">#define TPI_ITATBCTR0_ATREADY1_Pos          0U                                         </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01162" name="l01162"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga21e1f9c5532e75ee2edc8eb4cf69b1f0"> 1162</a></span><span class="preprocessor">#define TPI_ITATBCTR0_ATREADY1_Msk         (0x1UL </span><span class="comment">/*&lt;&lt; TPI_ITATBCTR0_ATREADY1_Pos*/</span><span class="preprocessor">)   </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01163" name="l01163"></a><span class="lineno"> 1163</span> </div>
<div class="line"><a id="l01164" name="l01164"></a><span class="lineno"> 1164</span><span class="comment">/* TPI Integration Mode Control Register Definitions */</span></div>
<div class="line"><a id="l01165" name="l01165"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gaa847adb71a1bc811d2e3190528f495f0"> 1165</a></span><span class="preprocessor">#define TPI_ITCTRL_Mode_Pos                 0U                                         </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01166" name="l01166"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gad6f87550b468ad0920d5f405bfd3f017"> 1166</a></span><span class="preprocessor">#define TPI_ITCTRL_Mode_Msk                (0x3UL </span><span class="comment">/*&lt;&lt; TPI_ITCTRL_Mode_Pos*/</span><span class="preprocessor">)          </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01167" name="l01167"></a><span class="lineno"> 1167</span> </div>
<div class="line"><a id="l01168" name="l01168"></a><span class="lineno"> 1168</span><span class="comment">/* TPI DEVID Register Definitions */</span></div>
<div class="line"><a id="l01169" name="l01169"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga9f46cf1a1708575f56d6b827766277f4"> 1169</a></span><span class="preprocessor">#define TPI_DEVID_NRZVALID_Pos             11U                                         </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01170" name="l01170"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gacecc8710a8f6a23a7d1d4f5674daf02a"> 1170</a></span><span class="preprocessor">#define TPI_DEVID_NRZVALID_Msk             (0x1UL &lt;&lt; TPI_DEVID_NRZVALID_Pos)           </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01171" name="l01171"></a><span class="lineno"> 1171</span> </div>
<div class="line"><a id="l01172" name="l01172"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga675534579d9e25477bb38970e3ef973c"> 1172</a></span><span class="preprocessor">#define TPI_DEVID_MANCVALID_Pos            10U                                         </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01173" name="l01173"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga4c3ee4b1a34ad1960a6b2d6e7e0ff942"> 1173</a></span><span class="preprocessor">#define TPI_DEVID_MANCVALID_Msk            (0x1UL &lt;&lt; TPI_DEVID_MANCVALID_Pos)          </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01174" name="l01174"></a><span class="lineno"> 1174</span> </div>
<div class="line"><a id="l01175" name="l01175"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga974cccf4c958b4a45cb71c7b5de39b7b"> 1175</a></span><span class="preprocessor">#define TPI_DEVID_PTINVALID_Pos             9U                                         </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01176" name="l01176"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga1ca84d62243e475836bba02516ba6b97"> 1176</a></span><span class="preprocessor">#define TPI_DEVID_PTINVALID_Msk            (0x1UL &lt;&lt; TPI_DEVID_PTINVALID_Pos)          </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01177" name="l01177"></a><span class="lineno"> 1177</span> </div>
<div class="line"><a id="l01178" name="l01178"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga3f7da5de2a34be41a092e5eddd22ac4d"> 1178</a></span><span class="preprocessor">#define TPI_DEVID_MinBufSz_Pos              6U                                         </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01179" name="l01179"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga939e068ff3f1a65b35187ab34a342cd8"> 1179</a></span><span class="preprocessor">#define TPI_DEVID_MinBufSz_Msk             (0x7UL &lt;&lt; TPI_DEVID_MinBufSz_Pos)           </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01180" name="l01180"></a><span class="lineno"> 1180</span> </div>
<div class="line"><a id="l01181" name="l01181"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gab382b1296b5efd057be606eb8f768df8"> 1181</a></span><span class="preprocessor">#define TPI_DEVID_AsynClkIn_Pos             5U                                         </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01182" name="l01182"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gab67830557d2d10be882284275025a2d3"> 1182</a></span><span class="preprocessor">#define TPI_DEVID_AsynClkIn_Msk            (0x1UL &lt;&lt; TPI_DEVID_AsynClkIn_Pos)          </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01183" name="l01183"></a><span class="lineno"> 1183</span> </div>
<div class="line"><a id="l01184" name="l01184"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga80ecae7fec479e80e583f545996868ed"> 1184</a></span><span class="preprocessor">#define TPI_DEVID_NrTraceInput_Pos          0U                                         </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01185" name="l01185"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gabed454418d2140043cd65ec899abd97f"> 1185</a></span><span class="preprocessor">#define TPI_DEVID_NrTraceInput_Msk         (0x1FUL </span><span class="comment">/*&lt;&lt; TPI_DEVID_NrTraceInput_Pos*/</span><span class="preprocessor">)  </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01186" name="l01186"></a><span class="lineno"> 1186</span> </div>
<div class="line"><a id="l01187" name="l01187"></a><span class="lineno"> 1187</span><span class="comment">/* TPI DEVTYPE Register Definitions */</span></div>
<div class="line"><a id="l01188" name="l01188"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga0c799ff892af5eb3162d152abc00af7a"> 1188</a></span><span class="preprocessor">#define TPI_DEVTYPE_SubType_Pos             4U                                         </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01189" name="l01189"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga5b2fd7dddaf5f64855d9c0696acd65c1"> 1189</a></span><span class="preprocessor">#define TPI_DEVTYPE_SubType_Msk            (0xFUL </span><span class="comment">/*&lt;&lt; TPI_DEVTYPE_SubType_Pos*/</span><span class="preprocessor">)      </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01190" name="l01190"></a><span class="lineno"> 1190</span> </div>
<div class="line"><a id="l01191" name="l01191"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga69c4892d332755a9f64c1680497cebdd"> 1191</a></span><span class="preprocessor">#define TPI_DEVTYPE_MajorType_Pos           0U                                         </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01192" name="l01192"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gaecbceed6d08ec586403b37ad47b38c88"> 1192</a></span><span class="preprocessor">#define TPI_DEVTYPE_MajorType_Msk          (0xFUL &lt;&lt; TPI_DEVTYPE_MajorType_Pos)        </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01193" name="l01193"></a><span class="lineno"> 1193</span> <span class="comment">/* end of group CMSIS_TPI */</span></div>
<div class="line"><a id="l01195" name="l01195"></a><span class="lineno"> 1195</span> </div>
<div class="line"><a id="l01196" name="l01196"></a><span class="lineno"> 1196</span> </div>
<div class="line"><a id="l01197" name="l01197"></a><span class="lineno"> 1197</span><span class="preprocessor">#if defined (__MPU_PRESENT) &amp;&amp; (__MPU_PRESENT == 1U)</span><span class="preprocessor"></span></div>
<div class="line"><a id="l01204" name="l01204"></a><span class="lineno"> 1204</span></div>
<div class="line"><a id="l01208" name="l01208"></a><span class="lineno"> 1208</span><span class="keyword">typedef</span> <span class="keyword">struct</span></div>
<div class="line"><a id="l01209" name="l01209"></a><span class="lineno"> 1209</span>{</div>
<div class="line"><a id="l01210" name="l01210"></a><span class="lineno"> 1210</span>  __IM  uint32_t TYPE;                   </div>
<div class="line"><a id="l01211" name="l01211"></a><span class="lineno"> 1211</span>  __IOM uint32_t CTRL;                   </div>
<div class="line"><a id="l01212" name="l01212"></a><span class="lineno"> 1212</span>  __IOM uint32_t RNR;                    </div>
<div class="line"><a id="l01213" name="l01213"></a><span class="lineno"> 1213</span>  __IOM uint32_t RBAR;                   </div>
<div class="line"><a id="l01214" name="l01214"></a><span class="lineno"> 1214</span>  __IOM uint32_t RASR;                   </div>
<div class="line"><a id="l01215" name="l01215"></a><span class="lineno"> 1215</span>  __IOM uint32_t RBAR_A1;                </div>
<div class="line"><a id="l01216" name="l01216"></a><span class="lineno"> 1216</span>  __IOM uint32_t RASR_A1;                </div>
<div class="line"><a id="l01217" name="l01217"></a><span class="lineno"> 1217</span>  __IOM uint32_t RBAR_A2;                </div>
<div class="line"><a id="l01218" name="l01218"></a><span class="lineno"> 1218</span>  __IOM uint32_t RASR_A2;                </div>
<div class="line"><a id="l01219" name="l01219"></a><span class="lineno"> 1219</span>  __IOM uint32_t RBAR_A3;                </div>
<div class="line"><a id="l01220" name="l01220"></a><span class="lineno"> 1220</span>  __IOM uint32_t RASR_A3;                </div>
<div class="line"><a id="l01221" name="l01221"></a><span class="lineno"> 1221</span>} <a class="code hl_struct" href="struct_m_p_u___type.html">MPU_Type</a>;</div>
<div class="line"><a id="l01222" name="l01222"></a><span class="lineno"> 1222</span> </div>
<div class="line"><a id="l01223" name="l01223"></a><span class="lineno"> 1223</span><span class="preprocessor">#define MPU_TYPE_RALIASES                  4U</span></div>
<div class="line"><a id="l01224" name="l01224"></a><span class="lineno"> 1224</span> </div>
<div class="line"><a id="l01225" name="l01225"></a><span class="lineno"> 1225</span><span class="comment">/* MPU Type Register Definitions */</span></div>
<div class="line"><a id="l01226" name="l01226"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gab46a4e0dae7607af6f312cf2328ecfc9"> 1226</a></span><span class="preprocessor">#define MPU_TYPE_IREGION_Pos               16U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01227" name="l01227"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga84c08304cbf7088481f2f6ccd8013c39"> 1227</a></span><span class="preprocessor">#define MPU_TYPE_IREGION_Msk               (0xFFUL &lt;&lt; MPU_TYPE_IREGION_Pos)               </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01228" name="l01228"></a><span class="lineno"> 1228</span> </div>
<div class="line"><a id="l01229" name="l01229"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga4d090ef632d2ba3a6ae4078c2594d6d3"> 1229</a></span><span class="preprocessor">#define MPU_TYPE_DREGION_Pos                8U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01230" name="l01230"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga3a5d2e6871b1518dca61e28b18aec6cb"> 1230</a></span><span class="preprocessor">#define MPU_TYPE_DREGION_Msk               (0xFFUL &lt;&lt; MPU_TYPE_DREGION_Pos)               </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01231" name="l01231"></a><span class="lineno"> 1231</span> </div>
<div class="line"><a id="l01232" name="l01232"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gaa3ef8bc16dfa8b27f80b87109b424fe7"> 1232</a></span><span class="preprocessor">#define MPU_TYPE_SEPARATE_Pos               0U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01233" name="l01233"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga45427152e9a3493f1477fbe52e771c59"> 1233</a></span><span class="preprocessor">#define MPU_TYPE_SEPARATE_Msk              (1UL </span><span class="comment">/*&lt;&lt; MPU_TYPE_SEPARATE_Pos*/</span><span class="preprocessor">)             </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01234" name="l01234"></a><span class="lineno"> 1234</span> </div>
<div class="line"><a id="l01235" name="l01235"></a><span class="lineno"> 1235</span><span class="comment">/* MPU Control Register Definitions */</span></div>
<div class="line"><a id="l01236" name="l01236"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga723678c07d8d65eacb5dd957867b1b0c"> 1236</a></span><span class="preprocessor">#define MPU_CTRL_PRIVDEFENA_Pos             2U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01237" name="l01237"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga09e80ffe9a690dc76e416708661ea436"> 1237</a></span><span class="preprocessor">#define MPU_CTRL_PRIVDEFENA_Msk            (1UL &lt;&lt; MPU_CTRL_PRIVDEFENA_Pos)               </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01238" name="l01238"></a><span class="lineno"> 1238</span> </div>
<div class="line"><a id="l01239" name="l01239"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gab41c6f2447fb6dffa9a887ddc7c418c5"> 1239</a></span><span class="preprocessor">#define MPU_CTRL_HFNMIENA_Pos               1U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01240" name="l01240"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gaa0db6e8e71df9529f3300d7a1e9a7b69"> 1240</a></span><span class="preprocessor">#define MPU_CTRL_HFNMIENA_Msk              (1UL &lt;&lt; MPU_CTRL_HFNMIENA_Pos)                 </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01241" name="l01241"></a><span class="lineno"> 1241</span> </div>
<div class="line"><a id="l01242" name="l01242"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga726096caf670db669c53458f7ea07373"> 1242</a></span><span class="preprocessor">#define MPU_CTRL_ENABLE_Pos                 0U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01243" name="l01243"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gae72b283f6e38b641c877182f03d95844"> 1243</a></span><span class="preprocessor">#define MPU_CTRL_ENABLE_Msk                (1UL </span><span class="comment">/*&lt;&lt; MPU_CTRL_ENABLE_Pos*/</span><span class="preprocessor">)               </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01244" name="l01244"></a><span class="lineno"> 1244</span> </div>
<div class="line"><a id="l01245" name="l01245"></a><span class="lineno"> 1245</span><span class="comment">/* MPU Region Number Register Definitions */</span></div>
<div class="line"><a id="l01246" name="l01246"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga4ae5ef482542113b2361e7de9e3419af"> 1246</a></span><span class="preprocessor">#define MPU_RNR_REGION_Pos                  0U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01247" name="l01247"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga2d48d65bbe6e37caf7534e3c93da30f7"> 1247</a></span><span class="preprocessor">#define MPU_RNR_REGION_Msk                 (0xFFUL </span><span class="comment">/*&lt;&lt; MPU_RNR_REGION_Pos*/</span><span class="preprocessor">)             </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01248" name="l01248"></a><span class="lineno"> 1248</span> </div>
<div class="line"><a id="l01249" name="l01249"></a><span class="lineno"> 1249</span><span class="comment">/* MPU Region Base Address Register Definitions */</span></div>
<div class="line"><a id="l01250" name="l01250"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga8526c8bf02e4d47c852aab797800b1fd"> 1250</a></span><span class="preprocessor">#define MPU_RBAR_ADDR_Pos                   5U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01251" name="l01251"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga33905dca89aa5b5bb9aa9518094b8b80"> 1251</a></span><span class="preprocessor">#define MPU_RBAR_ADDR_Msk                  (0x7FFFFFFUL &lt;&lt; MPU_RBAR_ADDR_Pos)             </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01252" name="l01252"></a><span class="lineno"> 1252</span> </div>
<div class="line"><a id="l01253" name="l01253"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga1384f1a3d45f52c7829151ebc45e2c81"> 1253</a></span><span class="preprocessor">#define MPU_RBAR_VALID_Pos                  4U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01254" name="l01254"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gaf7787465931ee4dbe5f51091f187e790"> 1254</a></span><span class="preprocessor">#define MPU_RBAR_VALID_Msk                 (1UL &lt;&lt; MPU_RBAR_VALID_Pos)                    </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01255" name="l01255"></a><span class="lineno"> 1255</span> </div>
<div class="line"><a id="l01256" name="l01256"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga0556413825169bdcb19e37f42d92e133"> 1256</a></span><span class="preprocessor">#define MPU_RBAR_REGION_Pos                 0U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01257" name="l01257"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gac896033cb8ecfe045d9bada07c0311d7"> 1257</a></span><span class="preprocessor">#define MPU_RBAR_REGION_Msk                (0xFUL </span><span class="comment">/*&lt;&lt; MPU_RBAR_REGION_Pos*/</span><span class="preprocessor">)             </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01258" name="l01258"></a><span class="lineno"> 1258</span> </div>
<div class="line"><a id="l01259" name="l01259"></a><span class="lineno"> 1259</span><span class="comment">/* MPU Region Attribute and Size Register Definitions */</span></div>
<div class="line"><a id="l01260" name="l01260"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga8b0139cc494b195c4a2e313164e23104"> 1260</a></span><span class="preprocessor">#define MPU_RASR_ATTRS_Pos                 16U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01261" name="l01261"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gac7cbca45f69ce6a8923fd6d775175b35"> 1261</a></span><span class="preprocessor">#define MPU_RASR_ATTRS_Msk                 (0xFFFFUL &lt;&lt; MPU_RASR_ATTRS_Pos)               </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01262" name="l01262"></a><span class="lineno"> 1262</span> </div>
<div class="line"><a id="l01263" name="l01263"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gaa02d0a5dd8b96fb9500cb5f31c9ea67b"> 1263</a></span><span class="preprocessor">#define MPU_RASR_XN_Pos                    28U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01264" name="l01264"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga4f8afc5cc7fca2ada211f8b09c76802e"> 1264</a></span><span class="preprocessor">#define MPU_RASR_XN_Msk                    (1UL &lt;&lt; MPU_RASR_XN_Pos)                       </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01265" name="l01265"></a><span class="lineno"> 1265</span> </div>
<div class="line"><a id="l01266" name="l01266"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gac919b25b709081bac1fe1d30e6ca53d7"> 1266</a></span><span class="preprocessor">#define MPU_RASR_AP_Pos                    24U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01267" name="l01267"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga81da5e9383eca09414642d65fcbc14de"> 1267</a></span><span class="preprocessor">#define MPU_RASR_AP_Msk                    (0x7UL &lt;&lt; MPU_RASR_AP_Pos)                     </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01268" name="l01268"></a><span class="lineno"> 1268</span> </div>
<div class="line"><a id="l01269" name="l01269"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga340f1c91469c5bb4ee91bc29ad21c631"> 1269</a></span><span class="preprocessor">#define MPU_RASR_TEX_Pos                   19U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01270" name="l01270"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga94f4b4a368986c1955b92743046a1f4e"> 1270</a></span><span class="preprocessor">#define MPU_RASR_TEX_Msk                   (0x7UL &lt;&lt; MPU_RASR_TEX_Pos)                    </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01271" name="l01271"></a><span class="lineno"> 1271</span> </div>
<div class="line"><a id="l01272" name="l01272"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga1820e125a5aa584cd49ede44c742985c"> 1272</a></span><span class="preprocessor">#define MPU_RASR_S_Pos                     18U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01273" name="l01273"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga872c0922578c2e74304886579e9a2361"> 1273</a></span><span class="preprocessor">#define MPU_RASR_S_Msk                     (1UL &lt;&lt; MPU_RASR_S_Pos)                        </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01274" name="l01274"></a><span class="lineno"> 1274</span> </div>
<div class="line"><a id="l01275" name="l01275"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga3a1631f2c85c66ead1d6d4cea9c16a52"> 1275</a></span><span class="preprocessor">#define MPU_RASR_C_Pos                     17U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01276" name="l01276"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gaf841f9bee5046fece4f513ecf707a3c1"> 1276</a></span><span class="preprocessor">#define MPU_RASR_C_Msk                     (1UL &lt;&lt; MPU_RASR_C_Pos)                        </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01277" name="l01277"></a><span class="lineno"> 1277</span> </div>
<div class="line"><a id="l01278" name="l01278"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gae9ea3c456f66c56040a2e55793c63cf5"> 1278</a></span><span class="preprocessor">#define MPU_RASR_B_Pos                     16U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01279" name="l01279"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gaf97de2b86316d5b29931fc6f70b3cba1"> 1279</a></span><span class="preprocessor">#define MPU_RASR_B_Msk                     (1UL &lt;&lt; MPU_RASR_B_Pos)                        </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01280" name="l01280"></a><span class="lineno"> 1280</span> </div>
<div class="line"><a id="l01281" name="l01281"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gadbd68b7db2dd697a1977a7ed2f3e67bf"> 1281</a></span><span class="preprocessor">#define MPU_RASR_SRD_Pos                    8U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01282" name="l01282"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga4046ede234a191e3a0efb9a3174bca05"> 1282</a></span><span class="preprocessor">#define MPU_RASR_SRD_Msk                   (0xFFUL &lt;&lt; MPU_RASR_SRD_Pos)                   </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01283" name="l01283"></a><span class="lineno"> 1283</span> </div>
<div class="line"><a id="l01284" name="l01284"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gad90549193db0d2b7e70d3d52cb902710"> 1284</a></span><span class="preprocessor">#define MPU_RASR_SIZE_Pos                   1U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01285" name="l01285"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga222e237e51f20d0e8a8c249295e77298"> 1285</a></span><span class="preprocessor">#define MPU_RASR_SIZE_Msk                  (0x1FUL &lt;&lt; MPU_RASR_SIZE_Pos)                  </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01286" name="l01286"></a><span class="lineno"> 1286</span> </div>
<div class="line"><a id="l01287" name="l01287"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga57bfb267c5c8c5d8ead5380d4820f9dd"> 1287</a></span><span class="preprocessor">#define MPU_RASR_ENABLE_Pos                 0U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01288" name="l01288"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gaf6c4850fc33a5f13a42cf25dbce72646"> 1288</a></span><span class="preprocessor">#define MPU_RASR_ENABLE_Msk                (1UL </span><span class="comment">/*&lt;&lt; MPU_RASR_ENABLE_Pos*/</span><span class="preprocessor">)               </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01289" name="l01289"></a><span class="lineno"> 1289</span></div>
<div class="line"><a id="l01291" name="l01291"></a><span class="lineno"> 1291</span><span class="preprocessor">#endif </span><span class="comment">/* defined (__MPU_PRESENT) &amp;&amp; (__MPU_PRESENT == 1U) */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l01292" name="l01292"></a><span class="lineno"> 1292</span> </div>
<div class="line"><a id="l01293" name="l01293"></a><span class="lineno"> 1293</span></div>
<div class="line"><a id="l01300" name="l01300"></a><span class="lineno"> 1300</span></div>
<div class="line"><a id="l01304" name="l01304"></a><span class="lineno"> 1304</span><span class="keyword">typedef</span> <span class="keyword">struct</span></div>
<div class="line"><a id="l01305" name="l01305"></a><span class="lineno"> 1305</span>{</div>
<div class="line"><a id="l01306" name="l01306"></a><span class="lineno"> 1306</span>        uint32_t RESERVED0[1U];</div>
<div class="line"><a id="l01307" name="l01307"></a><span class="lineno"> 1307</span>  __IOM uint32_t FPCCR;                  </div>
<div class="line"><a id="l01308" name="l01308"></a><span class="lineno"> 1308</span>  __IOM uint32_t FPCAR;                  </div>
<div class="line"><a id="l01309" name="l01309"></a><span class="lineno"> 1309</span>  __IOM uint32_t FPDSCR;                 </div>
<div class="line"><a id="l01310" name="l01310"></a><span class="lineno"> 1310</span>  __IM  uint32_t MVFR0;                  </div>
<div class="line"><a id="l01311" name="l01311"></a><span class="lineno"> 1311</span>  __IM  uint32_t MVFR1;                  </div>
<div class="line"><a id="l01312" name="l01312"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s__core___debug_functions.html#ga479130e53a8b3c36fd8ee38b503a3911"> 1312</a></span>  __IM  uint32_t <a class="code hl_variable" href="group___c_m_s_i_s__core___debug_functions.html#ga479130e53a8b3c36fd8ee38b503a3911">MVFR2</a>;                  </div>
<div class="line"><a id="l01313" name="l01313"></a><span class="lineno"> 1313</span>} <a class="code hl_struct" href="struct_f_p_u___type.html">FPU_Type</a>;</div>
<div class="line"><a id="l01314" name="l01314"></a><span class="lineno"> 1314</span> </div>
<div class="line"><a id="l01315" name="l01315"></a><span class="lineno"> 1315</span><span class="comment">/* Floating-Point Context Control Register Definitions */</span></div>
<div class="line"><a id="l01316" name="l01316"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga4228a923ddf665f868e56b4b9e9bff7b"> 1316</a></span><span class="preprocessor">#define FPU_FPCCR_ASPEN_Pos                31U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01317" name="l01317"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga309886ff6bbd25cb13c061c6683c6c0c"> 1317</a></span><span class="preprocessor">#define FPU_FPCCR_ASPEN_Msk                (1UL &lt;&lt; FPU_FPCCR_ASPEN_Pos)                   </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01318" name="l01318"></a><span class="lineno"> 1318</span> </div>
<div class="line"><a id="l01319" name="l01319"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gac7d70e051fe759ad8fed83bf5b5aebc1"> 1319</a></span><span class="preprocessor">#define FPU_FPCCR_LSPEN_Pos                30U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01320" name="l01320"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gaf4ab19de45df6522dd882bc116f938e9"> 1320</a></span><span class="preprocessor">#define FPU_FPCCR_LSPEN_Msk                (1UL &lt;&lt; FPU_FPCCR_LSPEN_Pos)                   </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01321" name="l01321"></a><span class="lineno"> 1321</span> </div>
<div class="line"><a id="l01322" name="l01322"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gae0a4effc79209d821ded517c2be326ba"> 1322</a></span><span class="preprocessor">#define FPU_FPCCR_MONRDY_Pos                8U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01323" name="l01323"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga42067729a887081cf56b8fe1029be7a1"> 1323</a></span><span class="preprocessor">#define FPU_FPCCR_MONRDY_Msk               (1UL &lt;&lt; FPU_FPCCR_MONRDY_Pos)                  </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01324" name="l01324"></a><span class="lineno"> 1324</span> </div>
<div class="line"><a id="l01325" name="l01325"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga6d633920f92c3ce4133d769701619b17"> 1325</a></span><span class="preprocessor">#define FPU_FPCCR_BFRDY_Pos                 6U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01326" name="l01326"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gad349eb1323d8399d54a04c0bfd520cb2"> 1326</a></span><span class="preprocessor">#define FPU_FPCCR_BFRDY_Msk                (1UL &lt;&lt; FPU_FPCCR_BFRDY_Pos)                   </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01327" name="l01327"></a><span class="lineno"> 1327</span> </div>
<div class="line"><a id="l01328" name="l01328"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gaccdb481211629f9440431439231187f1"> 1328</a></span><span class="preprocessor">#define FPU_FPCCR_MMRDY_Pos                 5U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01329" name="l01329"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gadedfaec9fdd07261573e823a4dcfb5c4"> 1329</a></span><span class="preprocessor">#define FPU_FPCCR_MMRDY_Msk                (1UL &lt;&lt; FPU_FPCCR_MMRDY_Pos)                   </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01330" name="l01330"></a><span class="lineno"> 1330</span> </div>
<div class="line"><a id="l01331" name="l01331"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gab12733991487acc2da41ca300fe36fb6"> 1331</a></span><span class="preprocessor">#define FPU_FPCCR_HFRDY_Pos                 4U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01332" name="l01332"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gaf4beaa279abff34828344bd594fff8a1"> 1332</a></span><span class="preprocessor">#define FPU_FPCCR_HFRDY_Msk                (1UL &lt;&lt; FPU_FPCCR_HFRDY_Pos)                   </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01333" name="l01333"></a><span class="lineno"> 1333</span> </div>
<div class="line"><a id="l01334" name="l01334"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga0937d64c42374200af44b22e5b49fd26"> 1334</a></span><span class="preprocessor">#define FPU_FPCCR_THREAD_Pos                3U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01335" name="l01335"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga8d18cd88336d63d4b1810383aa8da700"> 1335</a></span><span class="preprocessor">#define FPU_FPCCR_THREAD_Msk               (1UL &lt;&lt; FPU_FPCCR_THREAD_Pos)                  </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01336" name="l01336"></a><span class="lineno"> 1336</span> </div>
<div class="line"><a id="l01337" name="l01337"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gaea663104375ce6be15470e3db294c92d"> 1337</a></span><span class="preprocessor">#define FPU_FPCCR_USER_Pos                  1U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01338" name="l01338"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga2eb70427eeaa7344196219cf5a8620a4"> 1338</a></span><span class="preprocessor">#define FPU_FPCCR_USER_Msk                 (1UL &lt;&lt; FPU_FPCCR_USER_Pos)                    </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01339" name="l01339"></a><span class="lineno"> 1339</span> </div>
<div class="line"><a id="l01340" name="l01340"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga803bf3f6d15b04deaad0801bee5b35ed"> 1340</a></span><span class="preprocessor">#define FPU_FPCCR_LSPACT_Pos                0U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01341" name="l01341"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga86e7c2fa52ba65c3b535dfa33f2586eb"> 1341</a></span><span class="preprocessor">#define FPU_FPCCR_LSPACT_Msk               (1UL </span><span class="comment">/*&lt;&lt; FPU_FPCCR_LSPACT_Pos*/</span><span class="preprocessor">)              </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01342" name="l01342"></a><span class="lineno"> 1342</span> </div>
<div class="line"><a id="l01343" name="l01343"></a><span class="lineno"> 1343</span><span class="comment">/* Floating-Point Context Address Register Definitions */</span></div>
<div class="line"><a id="l01344" name="l01344"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gaf45377b7e45be8517ddbcf2028b80ae7"> 1344</a></span><span class="preprocessor">#define FPU_FPCAR_ADDRESS_Pos               3U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01345" name="l01345"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga517d89370c81325c5387b9c3085ac554"> 1345</a></span><span class="preprocessor">#define FPU_FPCAR_ADDRESS_Msk              (0x1FFFFFFFUL &lt;&lt; FPU_FPCAR_ADDRESS_Pos)        </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01346" name="l01346"></a><span class="lineno"> 1346</span> </div>
<div class="line"><a id="l01347" name="l01347"></a><span class="lineno"> 1347</span><span class="comment">/* Floating-Point Default Status Control Register Definitions */</span></div>
<div class="line"><a id="l01348" name="l01348"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga138f54bc002629ab3e4de814c58abb29"> 1348</a></span><span class="preprocessor">#define FPU_FPDSCR_AHP_Pos                 26U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01349" name="l01349"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gab2789cebebda5fda8c4e9d87e24f32be"> 1349</a></span><span class="preprocessor">#define FPU_FPDSCR_AHP_Msk                 (1UL &lt;&lt; FPU_FPDSCR_AHP_Pos)                    </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01350" name="l01350"></a><span class="lineno"> 1350</span> </div>
<div class="line"><a id="l01351" name="l01351"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga41776b80fa450ef2ea6d3fee89aa35f2"> 1351</a></span><span class="preprocessor">#define FPU_FPDSCR_DN_Pos                  25U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01352" name="l01352"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga40c2d4a297ca2ceffe174703a4ad17f6"> 1352</a></span><span class="preprocessor">#define FPU_FPDSCR_DN_Msk                  (1UL &lt;&lt; FPU_FPDSCR_DN_Pos)                     </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01353" name="l01353"></a><span class="lineno"> 1353</span> </div>
<div class="line"><a id="l01354" name="l01354"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gab3c2fc96e312ba47b902d5f80d9b8575"> 1354</a></span><span class="preprocessor">#define FPU_FPDSCR_FZ_Pos                  24U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01355" name="l01355"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gaae7d901442d4af97c6d22939cffc8ad9"> 1355</a></span><span class="preprocessor">#define FPU_FPDSCR_FZ_Msk                  (1UL &lt;&lt; FPU_FPDSCR_FZ_Pos)                     </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01356" name="l01356"></a><span class="lineno"> 1356</span> </div>
<div class="line"><a id="l01357" name="l01357"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga7aeedf36be8f170dd3e276028e8e29ed"> 1357</a></span><span class="preprocessor">#define FPU_FPDSCR_RMode_Pos               22U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01358" name="l01358"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga449beb50211f8e97df6b2640c82c4741"> 1358</a></span><span class="preprocessor">#define FPU_FPDSCR_RMode_Msk               (3UL &lt;&lt; FPU_FPDSCR_RMode_Pos)                  </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01359" name="l01359"></a><span class="lineno"> 1359</span> </div>
<div class="line"><a id="l01360" name="l01360"></a><span class="lineno"> 1360</span><span class="comment">/* Media and FP Feature Register 0 Definitions */</span></div>
<div class="line"><a id="l01361" name="l01361"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga1ebcc9076f08013f0ea814540df03e82"> 1361</a></span><span class="preprocessor">#define FPU_MVFR0_FP_rounding_modes_Pos    28U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01362" name="l01362"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gae6dc9339ac72227d5d54360bb9fbef1b"> 1362</a></span><span class="preprocessor">#define FPU_MVFR0_FP_rounding_modes_Msk    (0xFUL &lt;&lt; FPU_MVFR0_FP_rounding_modes_Pos)     </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01363" name="l01363"></a><span class="lineno"> 1363</span> </div>
<div class="line"><a id="l01364" name="l01364"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gabbf83a918536ebf10889cee71a0404c7"> 1364</a></span><span class="preprocessor">#define FPU_MVFR0_Short_vectors_Pos        24U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01365" name="l01365"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gabf261a72023fdfc64f32c6b21d55c5b9"> 1365</a></span><span class="preprocessor">#define FPU_MVFR0_Short_vectors_Msk        (0xFUL &lt;&lt; FPU_MVFR0_Short_vectors_Pos)         </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01366" name="l01366"></a><span class="lineno"> 1366</span> </div>
<div class="line"><a id="l01367" name="l01367"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga176c85453ba03257bf263adec05f7344"> 1367</a></span><span class="preprocessor">#define FPU_MVFR0_Square_root_Pos          20U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01368" name="l01368"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga3ec0bfec1640bdaf9dff027f275b446d"> 1368</a></span><span class="preprocessor">#define FPU_MVFR0_Square_root_Msk          (0xFUL &lt;&lt; FPU_MVFR0_Square_root_Pos)           </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01369" name="l01369"></a><span class="lineno"> 1369</span> </div>
<div class="line"><a id="l01370" name="l01370"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga167be203091e6cc7d00ad40ca48c4396"> 1370</a></span><span class="preprocessor">#define FPU_MVFR0_Divide_Pos               16U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01371" name="l01371"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gaeb7370768c6cdf06f8a15c86c6102ed2"> 1371</a></span><span class="preprocessor">#define FPU_MVFR0_Divide_Msk               (0xFUL &lt;&lt; FPU_MVFR0_Divide_Pos)                </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01372" name="l01372"></a><span class="lineno"> 1372</span> </div>
<div class="line"><a id="l01373" name="l01373"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga5c0715c41c4470f8bb0b6dcd34707f1c"> 1373</a></span><span class="preprocessor">#define FPU_MVFR0_FP_excep_trapping_Pos    12U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01374" name="l01374"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga29bbddd679e821e050699fda23e6c85e"> 1374</a></span><span class="preprocessor">#define FPU_MVFR0_FP_excep_trapping_Msk    (0xFUL &lt;&lt; FPU_MVFR0_FP_excep_trapping_Pos)     </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01375" name="l01375"></a><span class="lineno"> 1375</span> </div>
<div class="line"><a id="l01376" name="l01376"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga461e26147be0c39402a78cb6249e8f84"> 1376</a></span><span class="preprocessor">#define FPU_MVFR0_Double_precision_Pos      8U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01377" name="l01377"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga3f2c8c6c759ffe70f548a165602ea901"> 1377</a></span><span class="preprocessor">#define FPU_MVFR0_Double_precision_Msk     (0xFUL &lt;&lt; FPU_MVFR0_Double_precision_Pos)      </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01378" name="l01378"></a><span class="lineno"> 1378</span> </div>
<div class="line"><a id="l01379" name="l01379"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga1b4e9fe31992b1495c7a158747d42571"> 1379</a></span><span class="preprocessor">#define FPU_MVFR0_Single_precision_Pos      4U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01380" name="l01380"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga95008f205c9d25e4ffebdbdc50d5ae44"> 1380</a></span><span class="preprocessor">#define FPU_MVFR0_Single_precision_Msk     (0xFUL &lt;&lt; FPU_MVFR0_Single_precision_Pos)      </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01381" name="l01381"></a><span class="lineno"> 1381</span> </div>
<div class="line"><a id="l01382" name="l01382"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gaa1de44af3e3162c8c176a57564611618"> 1382</a></span><span class="preprocessor">#define FPU_MVFR0_A_SIMD_registers_Pos      0U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01383" name="l01383"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga118f13f9562805356e92b5ad52573021"> 1383</a></span><span class="preprocessor">#define FPU_MVFR0_A_SIMD_registers_Msk     (0xFUL </span><span class="comment">/*&lt;&lt; FPU_MVFR0_A_SIMD_registers_Pos*/</span><span class="preprocessor">)  </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01384" name="l01384"></a><span class="lineno"> 1384</span> </div>
<div class="line"><a id="l01385" name="l01385"></a><span class="lineno"> 1385</span><span class="comment">/* Media and FP Feature Register 1 Definitions */</span></div>
<div class="line"><a id="l01386" name="l01386"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga68c53771f02f4c73122a7b40796549cc"> 1386</a></span><span class="preprocessor">#define FPU_MVFR1_FP_fused_MAC_Pos         28U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01387" name="l01387"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gaf5129ab18948ff573a1ab29f0be47bc2"> 1387</a></span><span class="preprocessor">#define FPU_MVFR1_FP_fused_MAC_Msk         (0xFUL &lt;&lt; FPU_MVFR1_FP_fused_MAC_Pos)          </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01388" name="l01388"></a><span class="lineno"> 1388</span> </div>
<div class="line"><a id="l01389" name="l01389"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga02ceac0abcbdc8670633056bec005bfd"> 1389</a></span><span class="preprocessor">#define FPU_MVFR1_FP_HPFP_Pos              24U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01390" name="l01390"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gafe29dd327ed3b723b3f01759568e116d"> 1390</a></span><span class="preprocessor">#define FPU_MVFR1_FP_HPFP_Msk              (0xFUL &lt;&lt; FPU_MVFR1_FP_HPFP_Pos)               </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01391" name="l01391"></a><span class="lineno"> 1391</span> </div>
<div class="line"><a id="l01392" name="l01392"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gae34d7ce42e50e2f1ea3e654fd3ba690a"> 1392</a></span><span class="preprocessor">#define FPU_MVFR1_D_NaN_mode_Pos            4U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01393" name="l01393"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gad6af7c4632dba5a417307d456fe9b8a7"> 1393</a></span><span class="preprocessor">#define FPU_MVFR1_D_NaN_mode_Msk           (0xFUL &lt;&lt; FPU_MVFR1_D_NaN_mode_Pos)            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01394" name="l01394"></a><span class="lineno"> 1394</span> </div>
<div class="line"><a id="l01395" name="l01395"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga7faa5bfa85036f8511793234cbbc2409"> 1395</a></span><span class="preprocessor">#define FPU_MVFR1_FtZ_mode_Pos              0U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01396" name="l01396"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gac566bde39a7afcceffbb21d830c269c1"> 1396</a></span><span class="preprocessor">#define FPU_MVFR1_FtZ_mode_Msk             (0xFUL </span><span class="comment">/*&lt;&lt; FPU_MVFR1_FtZ_mode_Pos*/</span><span class="preprocessor">)          </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01397" name="l01397"></a><span class="lineno"> 1397</span> </div>
<div class="line"><a id="l01398" name="l01398"></a><span class="lineno"> 1398</span><span class="comment">/* Media and FP Feature Register 2 Definitions */</span></div>
<div class="line"><a id="l01399" name="l01399"></a><span class="lineno"> 1399</span> </div>
<div class="line"><a id="l01400" name="l01400"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga98723f6017d05f2ca5d8351829a43d7c"> 1400</a></span><span class="preprocessor">#define FPU_MVFR2_VFP_Misc_Pos              4U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01401" name="l01401"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gaf3f9795202dc9a2cfd0c51d7214db5d1"> 1401</a></span><span class="preprocessor">#define FPU_MVFR2_VFP_Misc_Msk             (0xFUL &lt;&lt; FPU_MVFR2_VFP_Misc_Pos)              </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01402" name="l01402"></a><span class="lineno"> 1402</span></div>
<div class="line"><a id="l01404" name="l01404"></a><span class="lineno"> 1404</span> </div>
<div class="line"><a id="l01405" name="l01405"></a><span class="lineno"> 1405</span></div>
<div class="line"><a id="l01412" name="l01412"></a><span class="lineno"> 1412</span></div>
<div class="line"><a id="l01416" name="l01416"></a><span class="lineno"> 1416</span><span class="keyword">typedef</span> <span class="keyword">struct</span></div>
<div class="line"><a id="l01417" name="l01417"></a><span class="lineno"> 1417</span>{</div>
<div class="line"><a id="l01418" name="l01418"></a><span class="lineno"> 1418</span>  __IOM uint32_t DHCSR;                  </div>
<div class="line"><a id="l01419" name="l01419"></a><span class="lineno"> 1419</span>  __OM  uint32_t DCRSR;                  </div>
<div class="line"><a id="l01420" name="l01420"></a><span class="lineno"> 1420</span>  __IOM uint32_t DCRDR;                  </div>
<div class="line"><a id="l01421" name="l01421"></a><span class="lineno"> 1421</span>  __IOM uint32_t DEMCR;                  </div>
<div class="line"><a id="l01422" name="l01422"></a><span class="lineno"> 1422</span>} <a class="code hl_struct" href="struct_core_debug___type.html">CoreDebug_Type</a>;</div>
<div class="line"><a id="l01423" name="l01423"></a><span class="lineno"> 1423</span> </div>
<div class="line"><a id="l01424" name="l01424"></a><span class="lineno"> 1424</span><span class="comment">/* Debug Halting Control and Status Register Definitions */</span></div>
<div class="line"><a id="l01425" name="l01425"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gac91280edd0ce932665cf75a23d11d842"> 1425</a></span><span class="preprocessor">#define CoreDebug_DHCSR_DBGKEY_Pos         16U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01426" name="l01426"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga1ce997cee15edaafe4aed77751816ffc"> 1426</a></span><span class="preprocessor">#define CoreDebug_DHCSR_DBGKEY_Msk         (0xFFFFUL &lt;&lt; CoreDebug_DHCSR_DBGKEY_Pos)       </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01427" name="l01427"></a><span class="lineno"> 1427</span> </div>
<div class="line"><a id="l01428" name="l01428"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga6f934c5427ea057394268e541fa97753"> 1428</a></span><span class="preprocessor">#define CoreDebug_DHCSR_S_RESET_ST_Pos     25U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01429" name="l01429"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gac474394bcceb31a8e09566c90b3f8922"> 1429</a></span><span class="preprocessor">#define CoreDebug_DHCSR_S_RESET_ST_Msk     (1UL &lt;&lt; CoreDebug_DHCSR_S_RESET_ST_Pos)        </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01430" name="l01430"></a><span class="lineno"> 1430</span> </div>
<div class="line"><a id="l01431" name="l01431"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga2328118f8b3574c871a53605eb17e730"> 1431</a></span><span class="preprocessor">#define CoreDebug_DHCSR_S_RETIRE_ST_Pos    24U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01432" name="l01432"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga89dceb5325f6bcb36a0473d65fbfcfa6"> 1432</a></span><span class="preprocessor">#define CoreDebug_DHCSR_S_RETIRE_ST_Msk    (1UL &lt;&lt; CoreDebug_DHCSR_S_RETIRE_ST_Pos)       </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01433" name="l01433"></a><span class="lineno"> 1433</span> </div>
<div class="line"><a id="l01434" name="l01434"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga2900dd56a988a4ed27ad664d5642807e"> 1434</a></span><span class="preprocessor">#define CoreDebug_DHCSR_S_LOCKUP_Pos       19U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01435" name="l01435"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga7b67e4506d7f464ef5dafd6219739756"> 1435</a></span><span class="preprocessor">#define CoreDebug_DHCSR_S_LOCKUP_Msk       (1UL &lt;&lt; CoreDebug_DHCSR_S_LOCKUP_Pos)          </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01436" name="l01436"></a><span class="lineno"> 1436</span> </div>
<div class="line"><a id="l01437" name="l01437"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga349ccea33accc705595624c2d334fbcb"> 1437</a></span><span class="preprocessor">#define CoreDebug_DHCSR_S_SLEEP_Pos        18U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01438" name="l01438"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga98d51538e645c2c1a422279cd85a0a25"> 1438</a></span><span class="preprocessor">#define CoreDebug_DHCSR_S_SLEEP_Msk        (1UL &lt;&lt; CoreDebug_DHCSR_S_SLEEP_Pos)           </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01439" name="l01439"></a><span class="lineno"> 1439</span> </div>
<div class="line"><a id="l01440" name="l01440"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga760a9a0d7f39951dc3f07d01f1f64772"> 1440</a></span><span class="preprocessor">#define CoreDebug_DHCSR_S_HALT_Pos         17U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01441" name="l01441"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga9f881ade3151a73bc5b02b73fe6473ca"> 1441</a></span><span class="preprocessor">#define CoreDebug_DHCSR_S_HALT_Msk         (1UL &lt;&lt; CoreDebug_DHCSR_S_HALT_Pos)            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01442" name="l01442"></a><span class="lineno"> 1442</span> </div>
<div class="line"><a id="l01443" name="l01443"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga20a71871ca8768019c51168c70c3f41d"> 1443</a></span><span class="preprocessor">#define CoreDebug_DHCSR_S_REGRDY_Pos       16U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01444" name="l01444"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gac4cd6f3178de48f473d8903e8c847c07"> 1444</a></span><span class="preprocessor">#define CoreDebug_DHCSR_S_REGRDY_Msk       (1UL &lt;&lt; CoreDebug_DHCSR_S_REGRDY_Pos)          </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01445" name="l01445"></a><span class="lineno"> 1445</span> </div>
<div class="line"><a id="l01446" name="l01446"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga85747214e2656df6b05ec72e4d22bd6d"> 1446</a></span><span class="preprocessor">#define CoreDebug_DHCSR_C_SNAPSTALL_Pos     5U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01447" name="l01447"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga53aa99b2e39a67622f3b9973e079c2b4"> 1447</a></span><span class="preprocessor">#define CoreDebug_DHCSR_C_SNAPSTALL_Msk    (1UL &lt;&lt; CoreDebug_DHCSR_C_SNAPSTALL_Pos)       </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01448" name="l01448"></a><span class="lineno"> 1448</span> </div>
<div class="line"><a id="l01449" name="l01449"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga0d2907400eb948a4ea3886ca083ec8e3"> 1449</a></span><span class="preprocessor">#define CoreDebug_DHCSR_C_MASKINTS_Pos      3U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01450" name="l01450"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga77fe1ef3c4a729c1c82fb62a94a51c31"> 1450</a></span><span class="preprocessor">#define CoreDebug_DHCSR_C_MASKINTS_Msk     (1UL &lt;&lt; CoreDebug_DHCSR_C_MASKINTS_Pos)        </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01451" name="l01451"></a><span class="lineno"> 1451</span> </div>
<div class="line"><a id="l01452" name="l01452"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gae1fc39e80de54c0339cbb1b298a9f0f9"> 1452</a></span><span class="preprocessor">#define CoreDebug_DHCSR_C_STEP_Pos          2U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01453" name="l01453"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gae6bda72fbd32cc5734ff3542170dc00d"> 1453</a></span><span class="preprocessor">#define CoreDebug_DHCSR_C_STEP_Msk         (1UL &lt;&lt; CoreDebug_DHCSR_C_STEP_Pos)            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01454" name="l01454"></a><span class="lineno"> 1454</span> </div>
<div class="line"><a id="l01455" name="l01455"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gaddf1d43f8857e4efc3dc4e6b15509692"> 1455</a></span><span class="preprocessor">#define CoreDebug_DHCSR_C_HALT_Pos          1U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01456" name="l01456"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga1d905a3aa594eb2e8bb78bcc4da05b3f"> 1456</a></span><span class="preprocessor">#define CoreDebug_DHCSR_C_HALT_Msk         (1UL &lt;&lt; CoreDebug_DHCSR_C_HALT_Pos)            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01457" name="l01457"></a><span class="lineno"> 1457</span> </div>
<div class="line"><a id="l01458" name="l01458"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gab557abb5b172b74d2cf44efb9d824e4e"> 1458</a></span><span class="preprocessor">#define CoreDebug_DHCSR_C_DEBUGEN_Pos       0U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01459" name="l01459"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gab815c741a4fc2a61988cd2fb7594210b"> 1459</a></span><span class="preprocessor">#define CoreDebug_DHCSR_C_DEBUGEN_Msk      (1UL </span><span class="comment">/*&lt;&lt; CoreDebug_DHCSR_C_DEBUGEN_Pos*/</span><span class="preprocessor">)     </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01460" name="l01460"></a><span class="lineno"> 1460</span> </div>
<div class="line"><a id="l01461" name="l01461"></a><span class="lineno"> 1461</span><span class="comment">/* Debug Core Register Selector Register Definitions */</span></div>
<div class="line"><a id="l01462" name="l01462"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga51e75942fc0614bc9bb2c0e96fcdda9a"> 1462</a></span><span class="preprocessor">#define CoreDebug_DCRSR_REGWnR_Pos         16U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01463" name="l01463"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga1eef4992d8f84bc6c0dffed1c87f90a5"> 1463</a></span><span class="preprocessor">#define CoreDebug_DCRSR_REGWnR_Msk         (1UL &lt;&lt; CoreDebug_DCRSR_REGWnR_Pos)            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01464" name="l01464"></a><span class="lineno"> 1464</span> </div>
<div class="line"><a id="l01465" name="l01465"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga52182c8a9f63a52470244c0bc2064f7b"> 1465</a></span><span class="preprocessor">#define CoreDebug_DCRSR_REGSEL_Pos          0U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01466" name="l01466"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga17cafbd72b55030219ce5609baa7c01d"> 1466</a></span><span class="preprocessor">#define CoreDebug_DCRSR_REGSEL_Msk         (0x1FUL </span><span class="comment">/*&lt;&lt; CoreDebug_DCRSR_REGSEL_Pos*/</span><span class="preprocessor">)     </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01467" name="l01467"></a><span class="lineno"> 1467</span> </div>
<div class="line"><a id="l01468" name="l01468"></a><span class="lineno"> 1468</span><span class="comment">/* Debug Exception and Monitor Control Register Definitions */</span></div>
<div class="line"><a id="l01469" name="l01469"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga6ff2102b98f86540224819a1b767ba39"> 1469</a></span><span class="preprocessor">#define CoreDebug_DEMCR_TRCENA_Pos         24U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01470" name="l01470"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga5e99652c1df93b441257389f49407834"> 1470</a></span><span class="preprocessor">#define CoreDebug_DEMCR_TRCENA_Msk         (1UL &lt;&lt; CoreDebug_DEMCR_TRCENA_Pos)            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01471" name="l01471"></a><span class="lineno"> 1471</span> </div>
<div class="line"><a id="l01472" name="l01472"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga341020a3b7450416d72544eaf8e57a64"> 1472</a></span><span class="preprocessor">#define CoreDebug_DEMCR_MON_REQ_Pos        19U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01473" name="l01473"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gae6384cbe8045051186d13ef9cdeace95"> 1473</a></span><span class="preprocessor">#define CoreDebug_DEMCR_MON_REQ_Msk        (1UL &lt;&lt; CoreDebug_DEMCR_MON_REQ_Pos)           </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01474" name="l01474"></a><span class="lineno"> 1474</span> </div>
<div class="line"><a id="l01475" name="l01475"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga9ae10710684e14a1a534e785ef390e1b"> 1475</a></span><span class="preprocessor">#define CoreDebug_DEMCR_MON_STEP_Pos       18U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01476" name="l01476"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga2ded814556de96fc369de7ae9a7ceb98"> 1476</a></span><span class="preprocessor">#define CoreDebug_DEMCR_MON_STEP_Msk       (1UL &lt;&lt; CoreDebug_DEMCR_MON_STEP_Pos)          </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01477" name="l01477"></a><span class="lineno"> 1477</span> </div>
<div class="line"><a id="l01478" name="l01478"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga1e2f706a59e0d8131279af1c7e152f8d"> 1478</a></span><span class="preprocessor">#define CoreDebug_DEMCR_MON_PEND_Pos       17U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01479" name="l01479"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga68ec55930269fab78e733dcfa32392f8"> 1479</a></span><span class="preprocessor">#define CoreDebug_DEMCR_MON_PEND_Msk       (1UL &lt;&lt; CoreDebug_DEMCR_MON_PEND_Pos)          </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01480" name="l01480"></a><span class="lineno"> 1480</span> </div>
<div class="line"><a id="l01481" name="l01481"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga802829678f6871863ae9ecf60a10425c"> 1481</a></span><span class="preprocessor">#define CoreDebug_DEMCR_MON_EN_Pos         16U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01482" name="l01482"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gac2b46b9b65bf8d23027f255fc9641977"> 1482</a></span><span class="preprocessor">#define CoreDebug_DEMCR_MON_EN_Msk         (1UL &lt;&lt; CoreDebug_DEMCR_MON_EN_Pos)            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01483" name="l01483"></a><span class="lineno"> 1483</span> </div>
<div class="line"><a id="l01484" name="l01484"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gaed9f42053031a9a30cd8054623304c0a"> 1484</a></span><span class="preprocessor">#define CoreDebug_DEMCR_VC_HARDERR_Pos     10U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01485" name="l01485"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga803fc98c5bb85f10f0347b23794847d1"> 1485</a></span><span class="preprocessor">#define CoreDebug_DEMCR_VC_HARDERR_Msk     (1UL &lt;&lt; CoreDebug_DEMCR_VC_HARDERR_Pos)        </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01486" name="l01486"></a><span class="lineno"> 1486</span> </div>
<div class="line"><a id="l01487" name="l01487"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga22079a6e436f23b90308be97e19cf07e"> 1487</a></span><span class="preprocessor">#define CoreDebug_DEMCR_VC_INTERR_Pos       9U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01488" name="l01488"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gad6815d8e3df302d2f0ff2c2c734ed29a"> 1488</a></span><span class="preprocessor">#define CoreDebug_DEMCR_VC_INTERR_Msk      (1UL &lt;&lt; CoreDebug_DEMCR_VC_INTERR_Pos)         </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01489" name="l01489"></a><span class="lineno"> 1489</span> </div>
<div class="line"><a id="l01490" name="l01490"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gab8e3d8f0f9590a51bbf10f6da3ad6933"> 1490</a></span><span class="preprocessor">#define CoreDebug_DEMCR_VC_BUSERR_Pos       8U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01491" name="l01491"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga9d29546aefe3ca8662a7fe48dd4a5b2b"> 1491</a></span><span class="preprocessor">#define CoreDebug_DEMCR_VC_BUSERR_Msk      (1UL &lt;&lt; CoreDebug_DEMCR_VC_BUSERR_Pos)         </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01492" name="l01492"></a><span class="lineno"> 1492</span> </div>
<div class="line"><a id="l01493" name="l01493"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga16f0d3d2ce1e1e8cd762d938ac56c4ac"> 1493</a></span><span class="preprocessor">#define CoreDebug_DEMCR_VC_STATERR_Pos      7U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01494" name="l01494"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gaa38b947d77672c48bba1280c0a642e19"> 1494</a></span><span class="preprocessor">#define CoreDebug_DEMCR_VC_STATERR_Msk     (1UL &lt;&lt; CoreDebug_DEMCR_VC_STATERR_Pos)        </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01495" name="l01495"></a><span class="lineno"> 1495</span> </div>
<div class="line"><a id="l01496" name="l01496"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga10fc7c53bca904c128bc8e1a03072d50"> 1496</a></span><span class="preprocessor">#define CoreDebug_DEMCR_VC_CHKERR_Pos       6U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01497" name="l01497"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga2f98b461d19746ab2febfddebb73da6f"> 1497</a></span><span class="preprocessor">#define CoreDebug_DEMCR_VC_CHKERR_Msk      (1UL &lt;&lt; CoreDebug_DEMCR_VC_CHKERR_Pos)         </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01498" name="l01498"></a><span class="lineno"> 1498</span> </div>
<div class="line"><a id="l01499" name="l01499"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gac9d13eb2add61f610d5ced1f7ad2adf8"> 1499</a></span><span class="preprocessor">#define CoreDebug_DEMCR_VC_NOCPERR_Pos      5U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01500" name="l01500"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga03ee58b1b02fdbf21612809034562f1c"> 1500</a></span><span class="preprocessor">#define CoreDebug_DEMCR_VC_NOCPERR_Msk     (1UL &lt;&lt; CoreDebug_DEMCR_VC_NOCPERR_Pos)        </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01501" name="l01501"></a><span class="lineno"> 1501</span> </div>
<div class="line"><a id="l01502" name="l01502"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga444454f7c7748e76cd76c3809c887c41"> 1502</a></span><span class="preprocessor">#define CoreDebug_DEMCR_VC_MMERR_Pos        4U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01503" name="l01503"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gad420a9b60620584faaca6289e83d3a87"> 1503</a></span><span class="preprocessor">#define CoreDebug_DEMCR_VC_MMERR_Msk       (1UL &lt;&lt; CoreDebug_DEMCR_VC_MMERR_Pos)          </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01504" name="l01504"></a><span class="lineno"> 1504</span> </div>
<div class="line"><a id="l01505" name="l01505"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga9fcf09666f7063a7303117aa32a85d5a"> 1505</a></span><span class="preprocessor">#define CoreDebug_DEMCR_VC_CORERESET_Pos    0U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01506" name="l01506"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga906476e53c1e1487c30f3a1181df9e30"> 1506</a></span><span class="preprocessor">#define CoreDebug_DEMCR_VC_CORERESET_Msk   (1UL </span><span class="comment">/*&lt;&lt; CoreDebug_DEMCR_VC_CORERESET_Pos*/</span><span class="preprocessor">)  </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01507" name="l01507"></a><span class="lineno"> 1507</span></div>
<div class="line"><a id="l01509" name="l01509"></a><span class="lineno"> 1509</span> </div>
<div class="line"><a id="l01510" name="l01510"></a><span class="lineno"> 1510</span></div>
<div class="line"><a id="l01517" name="l01517"></a><span class="lineno"> 1517</span></div>
<div class="line"><a id="l01524" name="l01524"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga286e3b913dbd236c7f48ea70c8821f4e"> 1524</a></span><span class="preprocessor">#define _VAL2FLD(field, value)    (((uint32_t)(value) &lt;&lt; field ## _Pos) &amp; field ## _Msk)</span></div>
<div class="line"><a id="l01525" name="l01525"></a><span class="lineno"> 1525</span></div>
<div class="line"><a id="l01532" name="l01532"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga139b6e261c981f014f386927ca4a8444"> 1532</a></span><span class="preprocessor">#define _FLD2VAL(field, value)    (((uint32_t)(value) &amp; field ## _Msk) &gt;&gt; field ## _Pos)</span></div>
<div class="line"><a id="l01533" name="l01533"></a><span class="lineno"> 1533</span></div>
<div class="line"><a id="l01535" name="l01535"></a><span class="lineno"> 1535</span> </div>
<div class="line"><a id="l01536" name="l01536"></a><span class="lineno"> 1536</span></div>
<div class="line"><a id="l01543" name="l01543"></a><span class="lineno"> 1543</span> </div>
<div class="line"><a id="l01544" name="l01544"></a><span class="lineno"> 1544</span><span class="comment">/* Memory mapping of Core Hardware */</span></div>
<div class="line"><a id="l01545" name="l01545"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga3c14ed93192c8d9143322bbf77ebf770"> 1545</a></span><span class="preprocessor">#define SCS_BASE            (0xE000E000UL)                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01546" name="l01546"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gadd76251e412a195ec0a8f47227a8359e"> 1546</a></span><span class="preprocessor">#define ITM_BASE            (0xE0000000UL)                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01547" name="l01547"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gafdab534f961bf8935eb456cb7700dcd2"> 1547</a></span><span class="preprocessor">#define DWT_BASE            (0xE0001000UL)                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01548" name="l01548"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga2b1eeff850a7e418844ca847145a1a68"> 1548</a></span><span class="preprocessor">#define TPI_BASE            (0xE0040000UL)                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01549" name="l01549"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga680604dbcda9e9b31a1639fcffe5230b"> 1549</a></span><span class="preprocessor">#define CoreDebug_BASE      (0xE000EDF0UL)                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01550" name="l01550"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga58effaac0b93006b756d33209e814646"> 1550</a></span><span class="preprocessor">#define SysTick_BASE        (SCS_BASE +  0x0010UL)                    </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01551" name="l01551"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gaa0288691785a5f868238e0468b39523d"> 1551</a></span><span class="preprocessor">#define NVIC_BASE           (SCS_BASE +  0x0100UL)                    </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01552" name="l01552"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gad55a7ddb8d4b2398b0c1cfec76c0d9fd"> 1552</a></span><span class="preprocessor">#define SCB_BASE            (SCS_BASE +  0x0D00UL)                    </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01553" name="l01553"></a><span class="lineno"> 1553</span> </div>
<div class="line"><a id="l01554" name="l01554"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga9fe0cd2eef83a8adad94490d9ecca63f"> 1554</a></span><span class="preprocessor">#define SCnSCB              ((SCnSCB_Type    *)     SCS_BASE      )   </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01555" name="l01555"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gaaaf6477c2bde2f00f99e3c2fd1060b01"> 1555</a></span><span class="preprocessor">#define SCB                 ((SCB_Type       *)     SCB_BASE      )   </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01556" name="l01556"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gacd96c53beeaff8f603fcda425eb295de"> 1556</a></span><span class="preprocessor">#define SysTick             ((SysTick_Type   *)     SysTick_BASE  )   </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01557" name="l01557"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gac8e97e8ce56ae9f57da1363a937f8a17"> 1557</a></span><span class="preprocessor">#define NVIC                ((NVIC_Type      *)     NVIC_BASE     )   </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01558" name="l01558"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gabae7cdf882def602cb787bb039ff6a43"> 1558</a></span><span class="preprocessor">#define ITM                 ((ITM_Type       *)     ITM_BASE      )   </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01559" name="l01559"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gabbe5a060185e1d5afa3f85b14e10a6ce"> 1559</a></span><span class="preprocessor">#define DWT                 ((DWT_Type       *)     DWT_BASE      )   </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01560" name="l01560"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga8b4dd00016aed25a0ea54e9a9acd1239"> 1560</a></span><span class="preprocessor">#define TPI                 ((TPI_Type       *)     TPI_BASE      )   </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01561" name="l01561"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gab6e30a2b802d9021619dbb0be7f5d63d"> 1561</a></span><span class="preprocessor">#define CoreDebug           ((CoreDebug_Type *)     CoreDebug_BASE)   </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01562" name="l01562"></a><span class="lineno"> 1562</span> </div>
<div class="line"><a id="l01563" name="l01563"></a><span class="lineno"> 1563</span><span class="preprocessor">#if defined (__MPU_PRESENT) &amp;&amp; (__MPU_PRESENT == 1U)</span></div>
<div class="line"><a id="l01564" name="l01564"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gaa0805ccd2bc4e42d63adb0618d2af571"> 1564</a></span><span class="preprocessor">  #define MPU_BASE          (SCS_BASE +  0x0D90UL)                    </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01565" name="l01565"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gaad8182e72fe5037a6ba1eb65a1554e0b"> 1565</a></span><span class="preprocessor">  #define MPU               ((MPU_Type       *)     MPU_BASE      )   </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01566" name="l01566"></a><span class="lineno"> 1566</span><span class="preprocessor">#endif</span></div>
<div class="line"><a id="l01567" name="l01567"></a><span class="lineno"> 1567</span> </div>
<div class="line"><a id="l01568" name="l01568"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga4dcad4027118c098c07bcd575f1fbb28"> 1568</a></span><span class="preprocessor">#define FPU_BASE            (SCS_BASE +  0x0F30UL)                    </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01569" name="l01569"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gabc7c93f2594e85ece1e1a24f10591428"> 1569</a></span><span class="preprocessor">#define FPU                 ((FPU_Type       *)     FPU_BASE      )   </span><span class="preprocessor"></span></div>
<div class="line"><a id="l01570" name="l01570"></a><span class="lineno"> 1570</span></div>
<div class="line"><a id="l01572" name="l01572"></a><span class="lineno"> 1572</span> </div>
<div class="line"><a id="l01573" name="l01573"></a><span class="lineno"> 1573</span> </div>
<div class="line"><a id="l01574" name="l01574"></a><span class="lineno"> 1574</span> </div>
<div class="line"><a id="l01575" name="l01575"></a><span class="lineno"> 1575</span><span class="comment">/*******************************************************************************</span></div>
<div class="line"><a id="l01576" name="l01576"></a><span class="lineno"> 1576</span><span class="comment"> *                Hardware Abstraction Layer</span></div>
<div class="line"><a id="l01577" name="l01577"></a><span class="lineno"> 1577</span><span class="comment">  Core Function Interface contains:</span></div>
<div class="line"><a id="l01578" name="l01578"></a><span class="lineno"> 1578</span><span class="comment">  - Core NVIC Functions</span></div>
<div class="line"><a id="l01579" name="l01579"></a><span class="lineno"> 1579</span><span class="comment">  - Core SysTick Functions</span></div>
<div class="line"><a id="l01580" name="l01580"></a><span class="lineno"> 1580</span><span class="comment">  - Core Debug Functions</span></div>
<div class="line"><a id="l01581" name="l01581"></a><span class="lineno"> 1581</span><span class="comment">  - Core Register Access Functions</span></div>
<div class="line"><a id="l01582" name="l01582"></a><span class="lineno"> 1582</span><span class="comment"> ******************************************************************************/</span></div>
<div class="line"><a id="l01586" name="l01586"></a><span class="lineno"> 1586</span> </div>
<div class="line"><a id="l01587" name="l01587"></a><span class="lineno"> 1587</span> </div>
<div class="line"><a id="l01588" name="l01588"></a><span class="lineno"> 1588</span> </div>
<div class="line"><a id="l01589" name="l01589"></a><span class="lineno"> 1589</span><span class="comment">/* ##########################   NVIC functions  #################################### */</span></div>
<div class="line"><a id="l01596" name="l01596"></a><span class="lineno"> 1596</span> </div>
<div class="line"><a id="l01597" name="l01597"></a><span class="lineno"> 1597</span><span class="preprocessor">#ifdef CMSIS_NVIC_VIRTUAL</span></div>
<div class="line"><a id="l01598" name="l01598"></a><span class="lineno"> 1598</span><span class="preprocessor">  #ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE</span></div>
<div class="line"><a id="l01599" name="l01599"></a><span class="lineno"> 1599</span><span class="preprocessor">    #define CMSIS_NVIC_VIRTUAL_HEADER_FILE &quot;cmsis_nvic_virtual.h&quot;</span></div>
<div class="line"><a id="l01600" name="l01600"></a><span class="lineno"> 1600</span><span class="preprocessor">  #endif</span></div>
<div class="line"><a id="l01601" name="l01601"></a><span class="lineno"> 1601</span><span class="preprocessor">  #include CMSIS_NVIC_VIRTUAL_HEADER_FILE</span></div>
<div class="line"><a id="l01602" name="l01602"></a><span class="lineno"> 1602</span><span class="preprocessor">#else</span></div>
<div class="line"><a id="l01603" name="l01603"></a><span class="lineno"> 1603</span><span class="preprocessor">  #define NVIC_SetPriorityGrouping    __NVIC_SetPriorityGrouping</span></div>
<div class="line"><a id="l01604" name="l01604"></a><span class="lineno"> 1604</span><span class="preprocessor">  #define NVIC_GetPriorityGrouping    __NVIC_GetPriorityGrouping</span></div>
<div class="line"><a id="l01605" name="l01605"></a><span class="lineno"> 1605</span><span class="preprocessor">  #define NVIC_EnableIRQ              __NVIC_EnableIRQ</span></div>
<div class="line"><a id="l01606" name="l01606"></a><span class="lineno"> 1606</span><span class="preprocessor">  #define NVIC_GetEnableIRQ           __NVIC_GetEnableIRQ</span></div>
<div class="line"><a id="l01607" name="l01607"></a><span class="lineno"> 1607</span><span class="preprocessor">  #define NVIC_DisableIRQ             __NVIC_DisableIRQ</span></div>
<div class="line"><a id="l01608" name="l01608"></a><span class="lineno"> 1608</span><span class="preprocessor">  #define NVIC_GetPendingIRQ          __NVIC_GetPendingIRQ</span></div>
<div class="line"><a id="l01609" name="l01609"></a><span class="lineno"> 1609</span><span class="preprocessor">  #define NVIC_SetPendingIRQ          __NVIC_SetPendingIRQ</span></div>
<div class="line"><a id="l01610" name="l01610"></a><span class="lineno"> 1610</span><span class="preprocessor">  #define NVIC_ClearPendingIRQ        __NVIC_ClearPendingIRQ</span></div>
<div class="line"><a id="l01611" name="l01611"></a><span class="lineno"> 1611</span><span class="preprocessor">  #define NVIC_GetActive              __NVIC_GetActive</span></div>
<div class="line"><a id="l01612" name="l01612"></a><span class="lineno"> 1612</span><span class="preprocessor">  #define NVIC_SetPriority            __NVIC_SetPriority</span></div>
<div class="line"><a id="l01613" name="l01613"></a><span class="lineno"> 1613</span><span class="preprocessor">  #define NVIC_GetPriority            __NVIC_GetPriority</span></div>
<div class="line"><a id="l01614" name="l01614"></a><span class="lineno"> 1614</span><span class="preprocessor">  #define NVIC_SystemReset            __NVIC_SystemReset</span></div>
<div class="line"><a id="l01615" name="l01615"></a><span class="lineno"> 1615</span><span class="preprocessor">#endif </span><span class="comment">/* CMSIS_NVIC_VIRTUAL */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l01616" name="l01616"></a><span class="lineno"> 1616</span> </div>
<div class="line"><a id="l01617" name="l01617"></a><span class="lineno"> 1617</span><span class="preprocessor">#ifdef CMSIS_VECTAB_VIRTUAL</span></div>
<div class="line"><a id="l01618" name="l01618"></a><span class="lineno"> 1618</span><span class="preprocessor">  #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE</span></div>
<div class="line"><a id="l01619" name="l01619"></a><span class="lineno"> 1619</span><span class="preprocessor">    #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE &quot;cmsis_vectab_virtual.h&quot;</span></div>
<div class="line"><a id="l01620" name="l01620"></a><span class="lineno"> 1620</span><span class="preprocessor">  #endif</span></div>
<div class="line"><a id="l01621" name="l01621"></a><span class="lineno"> 1621</span><span class="preprocessor">  #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE</span></div>
<div class="line"><a id="l01622" name="l01622"></a><span class="lineno"> 1622</span><span class="preprocessor">#else</span></div>
<div class="line"><a id="l01623" name="l01623"></a><span class="lineno"> 1623</span><span class="preprocessor">  #define NVIC_SetVector              __NVIC_SetVector</span></div>
<div class="line"><a id="l01624" name="l01624"></a><span class="lineno"> 1624</span><span class="preprocessor">  #define NVIC_GetVector              __NVIC_GetVector</span></div>
<div class="line"><a id="l01625" name="l01625"></a><span class="lineno"> 1625</span><span class="preprocessor">#endif  </span><span class="comment">/* (CMSIS_VECTAB_VIRTUAL) */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l01626" name="l01626"></a><span class="lineno"> 1626</span> </div>
<div class="line"><a id="l01627" name="l01627"></a><span class="lineno"> 1627</span><span class="preprocessor">#define NVIC_USER_IRQ_OFFSET          16</span></div>
<div class="line"><a id="l01628" name="l01628"></a><span class="lineno"> 1628</span> </div>
<div class="line"><a id="l01629" name="l01629"></a><span class="lineno"> 1629</span> </div>
<div class="line"><a id="l01630" name="l01630"></a><span class="lineno"> 1630</span><span class="comment">/* The following EXC_RETURN values are saved the LR on exception entry */</span></div>
<div class="line"><a id="l01631" name="l01631"></a><span class="lineno"> 1631</span><span class="preprocessor">#define EXC_RETURN_HANDLER         (0xFFFFFFF1UL)     </span><span class="comment">/* return to Handler mode, uses MSP after return                               */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l01632" name="l01632"></a><span class="lineno"> 1632</span><span class="preprocessor">#define EXC_RETURN_THREAD_MSP      (0xFFFFFFF9UL)     </span><span class="comment">/* return to Thread mode, uses MSP after return                                */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l01633" name="l01633"></a><span class="lineno"> 1633</span><span class="preprocessor">#define EXC_RETURN_THREAD_PSP      (0xFFFFFFFDUL)     </span><span class="comment">/* return to Thread mode, uses PSP after return                                */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l01634" name="l01634"></a><span class="lineno"> 1634</span><span class="preprocessor">#define EXC_RETURN_HANDLER_FPU     (0xFFFFFFE1UL)     </span><span class="comment">/* return to Handler mode, uses MSP after return, restore floating-point state */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l01635" name="l01635"></a><span class="lineno"> 1635</span><span class="preprocessor">#define EXC_RETURN_THREAD_MSP_FPU  (0xFFFFFFE9UL)     </span><span class="comment">/* return to Thread mode, uses MSP after return, restore floating-point state  */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l01636" name="l01636"></a><span class="lineno"> 1636</span><span class="preprocessor">#define EXC_RETURN_THREAD_PSP_FPU  (0xFFFFFFEDUL)     </span><span class="comment">/* return to Thread mode, uses PSP after return, restore floating-point state  */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l01637" name="l01637"></a><span class="lineno"> 1637</span> </div>
<div class="line"><a id="l01638" name="l01638"></a><span class="lineno"> 1638</span></div>
<div class="line"><a id="l01648" name="l01648"></a><span class="lineno"> 1648</span>__STATIC_INLINE <span class="keywordtype">void</span> __NVIC_SetPriorityGrouping(uint32_t PriorityGroup)</div>
<div class="line"><a id="l01649" name="l01649"></a><span class="lineno"> 1649</span>{</div>
<div class="line"><a id="l01650" name="l01650"></a><span class="lineno"> 1650</span>  uint32_t reg_value;</div>
<div class="line"><a id="l01651" name="l01651"></a><span class="lineno"> 1651</span>  uint32_t PriorityGroupTmp = (PriorityGroup &amp; (uint32_t)0x07UL);             <span class="comment">/* only values 0..7 are used          */</span></div>
<div class="line"><a id="l01652" name="l01652"></a><span class="lineno"> 1652</span> </div>
<div class="line"><a id="l01653" name="l01653"></a><span class="lineno"> 1653</span>  reg_value  =  <a class="code hl_define" href="group___c_m_s_i_s___c_o_r_e.html#gaaaf6477c2bde2f00f99e3c2fd1060b01">SCB</a>-&gt;AIRCR;                                                   <span class="comment">/* read old register configuration    */</span></div>
<div class="line"><a id="l01654" name="l01654"></a><span class="lineno"> 1654</span>  reg_value &amp;= ~((uint32_t)(<a class="code hl_define" href="group___c_m_s_i_s___c_o_r_e.html#ga90c7cf0c490e7ae55f9503a7fda1dd22">SCB_AIRCR_VECTKEY_Msk</a> | <a class="code hl_define" href="group___c_m_s_i_s___c_o_r_e.html#ga8be60fff03f48d0d345868060dc6dae7">SCB_AIRCR_PRIGROUP_Msk</a>)); <span class="comment">/* clear bits to change               */</span></div>
<div class="line"><a id="l01655" name="l01655"></a><span class="lineno"> 1655</span>  reg_value  =  (reg_value                                   |</div>
<div class="line"><a id="l01656" name="l01656"></a><span class="lineno"> 1656</span>                ((uint32_t)0x5FAUL &lt;&lt; <a class="code hl_define" href="group___c_m_s_i_s___c_o_r_e.html#gaaa27c0ba600bf82c3da08c748845b640">SCB_AIRCR_VECTKEY_Pos</a>) |</div>
<div class="line"><a id="l01657" name="l01657"></a><span class="lineno"> 1657</span>                (PriorityGroupTmp &lt;&lt; <a class="code hl_define" href="group___c_m_s_i_s___c_o_r_e.html#gaca155deccdeca0f2c76b8100d24196c8">SCB_AIRCR_PRIGROUP_Pos</a>)  );              <span class="comment">/* Insert write key and priority group */</span></div>
<div class="line"><a id="l01658" name="l01658"></a><span class="lineno"> 1658</span>  <a class="code hl_define" href="group___c_m_s_i_s___c_o_r_e.html#gaaaf6477c2bde2f00f99e3c2fd1060b01">SCB</a>-&gt;AIRCR =  reg_value;</div>
<div class="line"><a id="l01659" name="l01659"></a><span class="lineno"> 1659</span>}</div>
<div class="line"><a id="l01660" name="l01660"></a><span class="lineno"> 1660</span> </div>
<div class="line"><a id="l01661" name="l01661"></a><span class="lineno"> 1661</span></div>
<div class="line"><a id="l01667" name="l01667"></a><span class="lineno"> 1667</span>__STATIC_INLINE uint32_t <a class="code hl_define" href="group___c_m_s_i_s___core_debug.html#gae1de06155d072758b3453edb07d12459">__NVIC_GetPriorityGrouping</a>(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l01668" name="l01668"></a><span class="lineno"> 1668</span>{</div>
<div class="line"><a id="l01669" name="l01669"></a><span class="lineno"> 1669</span>  <span class="keywordflow">return</span> ((uint32_t)((<a class="code hl_define" href="group___c_m_s_i_s___c_o_r_e.html#gaaaf6477c2bde2f00f99e3c2fd1060b01">SCB</a>-&gt;AIRCR &amp; <a class="code hl_define" href="group___c_m_s_i_s___c_o_r_e.html#ga8be60fff03f48d0d345868060dc6dae7">SCB_AIRCR_PRIGROUP_Msk</a>) &gt;&gt; <a class="code hl_define" href="group___c_m_s_i_s___c_o_r_e.html#gaca155deccdeca0f2c76b8100d24196c8">SCB_AIRCR_PRIGROUP_Pos</a>));</div>
<div class="line"><a id="l01670" name="l01670"></a><span class="lineno"> 1670</span>}</div>
<div class="line"><a id="l01671" name="l01671"></a><span class="lineno"> 1671</span> </div>
<div class="line"><a id="l01672" name="l01672"></a><span class="lineno"> 1672</span></div>
<div class="line"><a id="l01679" name="l01679"></a><span class="lineno"> 1679</span>__STATIC_INLINE <span class="keywordtype">void</span> <a class="code hl_function" href="group___c_m_s_i_s___core___n_v_i_c_functions.html#ga71227e1376cde11eda03fcb62f1b33ea">__NVIC_EnableIRQ</a>(<a class="code hl_enumeration" href="group___peripheral__interrupt__number__definition.html#ga7e1129cd8a196f4284d41db3e82ad5c8">IRQn_Type</a> IRQn)</div>
<div class="line"><a id="l01680" name="l01680"></a><span class="lineno"> 1680</span>{</div>
<div class="line"><a id="l01681" name="l01681"></a><span class="lineno"> 1681</span>  <span class="keywordflow">if</span> ((int32_t)(IRQn) &gt;= 0)</div>
<div class="line"><a id="l01682" name="l01682"></a><span class="lineno"> 1682</span>  {</div>
<div class="line"><a id="l01683" name="l01683"></a><span class="lineno"> 1683</span>    __COMPILER_BARRIER();</div>
<div class="line"><a id="l01684" name="l01684"></a><span class="lineno"> 1684</span>    <a class="code hl_define" href="group___c_m_s_i_s___c_o_r_e.html#gac8e97e8ce56ae9f57da1363a937f8a17">NVIC</a>-&gt;ISER[(((uint32_t)IRQn) &gt;&gt; 5UL)] = (uint32_t)(1UL &lt;&lt; (((uint32_t)IRQn) &amp; 0x1FUL));</div>
<div class="line"><a id="l01685" name="l01685"></a><span class="lineno"> 1685</span>    __COMPILER_BARRIER();</div>
<div class="line"><a id="l01686" name="l01686"></a><span class="lineno"> 1686</span>  }</div>
<div class="line"><a id="l01687" name="l01687"></a><span class="lineno"> 1687</span>}</div>
<div class="line"><a id="l01688" name="l01688"></a><span class="lineno"> 1688</span> </div>
<div class="line"><a id="l01689" name="l01689"></a><span class="lineno"> 1689</span></div>
<div class="line"><a id="l01698" name="l01698"></a><span class="lineno"> 1698</span>__STATIC_INLINE uint32_t <a class="code hl_function" href="group___c_m_s_i_s___core___n_v_i_c_functions.html#gaaeb5e7cc0eaad4e2817272e7bf742083">__NVIC_GetEnableIRQ</a>(<a class="code hl_enumeration" href="group___peripheral__interrupt__number__definition.html#ga7e1129cd8a196f4284d41db3e82ad5c8">IRQn_Type</a> IRQn)</div>
<div class="line"><a id="l01699" name="l01699"></a><span class="lineno"> 1699</span>{</div>
<div class="line"><a id="l01700" name="l01700"></a><span class="lineno"> 1700</span>  <span class="keywordflow">if</span> ((int32_t)(IRQn) &gt;= 0)</div>
<div class="line"><a id="l01701" name="l01701"></a><span class="lineno"> 1701</span>  {</div>
<div class="line"><a id="l01702" name="l01702"></a><span class="lineno"> 1702</span>    <span class="keywordflow">return</span>((uint32_t)(((<a class="code hl_define" href="group___c_m_s_i_s___c_o_r_e.html#gac8e97e8ce56ae9f57da1363a937f8a17">NVIC</a>-&gt;ISER[(((uint32_t)IRQn) &gt;&gt; 5UL)] &amp; (1UL &lt;&lt; (((uint32_t)IRQn) &amp; 0x1FUL))) != 0UL) ? 1UL : 0UL));</div>
<div class="line"><a id="l01703" name="l01703"></a><span class="lineno"> 1703</span>  }</div>
<div class="line"><a id="l01704" name="l01704"></a><span class="lineno"> 1704</span>  <span class="keywordflow">else</span></div>
<div class="line"><a id="l01705" name="l01705"></a><span class="lineno"> 1705</span>  {</div>
<div class="line"><a id="l01706" name="l01706"></a><span class="lineno"> 1706</span>    <span class="keywordflow">return</span>(0U);</div>
<div class="line"><a id="l01707" name="l01707"></a><span class="lineno"> 1707</span>  }</div>
<div class="line"><a id="l01708" name="l01708"></a><span class="lineno"> 1708</span>}</div>
<div class="line"><a id="l01709" name="l01709"></a><span class="lineno"> 1709</span> </div>
<div class="line"><a id="l01710" name="l01710"></a><span class="lineno"> 1710</span></div>
<div class="line"><a id="l01717" name="l01717"></a><span class="lineno"> 1717</span>__STATIC_INLINE <span class="keywordtype">void</span> <a class="code hl_function" href="group___c_m_s_i_s___core___n_v_i_c_functions.html#gae016e4c1986312044ee768806537d52f">__NVIC_DisableIRQ</a>(<a class="code hl_enumeration" href="group___peripheral__interrupt__number__definition.html#ga7e1129cd8a196f4284d41db3e82ad5c8">IRQn_Type</a> IRQn)</div>
<div class="line"><a id="l01718" name="l01718"></a><span class="lineno"> 1718</span>{</div>
<div class="line"><a id="l01719" name="l01719"></a><span class="lineno"> 1719</span>  <span class="keywordflow">if</span> ((int32_t)(IRQn) &gt;= 0)</div>
<div class="line"><a id="l01720" name="l01720"></a><span class="lineno"> 1720</span>  {</div>
<div class="line"><a id="l01721" name="l01721"></a><span class="lineno"> 1721</span>    <a class="code hl_define" href="group___c_m_s_i_s___c_o_r_e.html#gac8e97e8ce56ae9f57da1363a937f8a17">NVIC</a>-&gt;ICER[(((uint32_t)IRQn) &gt;&gt; 5UL)] = (uint32_t)(1UL &lt;&lt; (((uint32_t)IRQn) &amp; 0x1FUL));</div>
<div class="line"><a id="l01722" name="l01722"></a><span class="lineno"> 1722</span>    <a class="code hl_define" href="group___c_m_s_i_s___core___instruction_interface.html#ga067d257a2b34565410acefb5afef2203">__DSB</a>();</div>
<div class="line"><a id="l01723" name="l01723"></a><span class="lineno"> 1723</span>    <a class="code hl_define" href="group___c_m_s_i_s___core___instruction_interface.html#gaad233022e850a009fc6f7602be1182f6">__ISB</a>();</div>
<div class="line"><a id="l01724" name="l01724"></a><span class="lineno"> 1724</span>  }</div>
<div class="line"><a id="l01725" name="l01725"></a><span class="lineno"> 1725</span>}</div>
<div class="line"><a id="l01726" name="l01726"></a><span class="lineno"> 1726</span> </div>
<div class="line"><a id="l01727" name="l01727"></a><span class="lineno"> 1727</span></div>
<div class="line"><a id="l01736" name="l01736"></a><span class="lineno"> 1736</span>__STATIC_INLINE uint32_t <a class="code hl_function" href="group___c_m_s_i_s___core___n_v_i_c_functions.html#ga5a92ca5fa801ad7adb92be7257ab9694">__NVIC_GetPendingIRQ</a>(<a class="code hl_enumeration" href="group___peripheral__interrupt__number__definition.html#ga7e1129cd8a196f4284d41db3e82ad5c8">IRQn_Type</a> IRQn)</div>
<div class="line"><a id="l01737" name="l01737"></a><span class="lineno"> 1737</span>{</div>
<div class="line"><a id="l01738" name="l01738"></a><span class="lineno"> 1738</span>  <span class="keywordflow">if</span> ((int32_t)(IRQn) &gt;= 0)</div>
<div class="line"><a id="l01739" name="l01739"></a><span class="lineno"> 1739</span>  {</div>
<div class="line"><a id="l01740" name="l01740"></a><span class="lineno"> 1740</span>    <span class="keywordflow">return</span>((uint32_t)(((<a class="code hl_define" href="group___c_m_s_i_s___c_o_r_e.html#gac8e97e8ce56ae9f57da1363a937f8a17">NVIC</a>-&gt;ISPR[(((uint32_t)IRQn) &gt;&gt; 5UL)] &amp; (1UL &lt;&lt; (((uint32_t)IRQn) &amp; 0x1FUL))) != 0UL) ? 1UL : 0UL));</div>
<div class="line"><a id="l01741" name="l01741"></a><span class="lineno"> 1741</span>  }</div>
<div class="line"><a id="l01742" name="l01742"></a><span class="lineno"> 1742</span>  <span class="keywordflow">else</span></div>
<div class="line"><a id="l01743" name="l01743"></a><span class="lineno"> 1743</span>  {</div>
<div class="line"><a id="l01744" name="l01744"></a><span class="lineno"> 1744</span>    <span class="keywordflow">return</span>(0U);</div>
<div class="line"><a id="l01745" name="l01745"></a><span class="lineno"> 1745</span>  }</div>
<div class="line"><a id="l01746" name="l01746"></a><span class="lineno"> 1746</span>}</div>
<div class="line"><a id="l01747" name="l01747"></a><span class="lineno"> 1747</span> </div>
<div class="line"><a id="l01748" name="l01748"></a><span class="lineno"> 1748</span></div>
<div class="line"><a id="l01755" name="l01755"></a><span class="lineno"> 1755</span>__STATIC_INLINE <span class="keywordtype">void</span> <a class="code hl_function" href="group___c_m_s_i_s___core___n_v_i_c_functions.html#gaabefdd4b790b9a7308929938c0c1e1ad">__NVIC_SetPendingIRQ</a>(<a class="code hl_enumeration" href="group___peripheral__interrupt__number__definition.html#ga7e1129cd8a196f4284d41db3e82ad5c8">IRQn_Type</a> IRQn)</div>
<div class="line"><a id="l01756" name="l01756"></a><span class="lineno"> 1756</span>{</div>
<div class="line"><a id="l01757" name="l01757"></a><span class="lineno"> 1757</span>  <span class="keywordflow">if</span> ((int32_t)(IRQn) &gt;= 0)</div>
<div class="line"><a id="l01758" name="l01758"></a><span class="lineno"> 1758</span>  {</div>
<div class="line"><a id="l01759" name="l01759"></a><span class="lineno"> 1759</span>    <a class="code hl_define" href="group___c_m_s_i_s___c_o_r_e.html#gac8e97e8ce56ae9f57da1363a937f8a17">NVIC</a>-&gt;ISPR[(((uint32_t)IRQn) &gt;&gt; 5UL)] = (uint32_t)(1UL &lt;&lt; (((uint32_t)IRQn) &amp; 0x1FUL));</div>
<div class="line"><a id="l01760" name="l01760"></a><span class="lineno"> 1760</span>  }</div>
<div class="line"><a id="l01761" name="l01761"></a><span class="lineno"> 1761</span>}</div>
<div class="line"><a id="l01762" name="l01762"></a><span class="lineno"> 1762</span> </div>
<div class="line"><a id="l01763" name="l01763"></a><span class="lineno"> 1763</span></div>
<div class="line"><a id="l01770" name="l01770"></a><span class="lineno"> 1770</span>__STATIC_INLINE <span class="keywordtype">void</span> <a class="code hl_function" href="group___c_m_s_i_s___core___n_v_i_c_functions.html#ga562a86dbdf14827d0fee8fdafb04d191">__NVIC_ClearPendingIRQ</a>(<a class="code hl_enumeration" href="group___peripheral__interrupt__number__definition.html#ga7e1129cd8a196f4284d41db3e82ad5c8">IRQn_Type</a> IRQn)</div>
<div class="line"><a id="l01771" name="l01771"></a><span class="lineno"> 1771</span>{</div>
<div class="line"><a id="l01772" name="l01772"></a><span class="lineno"> 1772</span>  <span class="keywordflow">if</span> ((int32_t)(IRQn) &gt;= 0)</div>
<div class="line"><a id="l01773" name="l01773"></a><span class="lineno"> 1773</span>  {</div>
<div class="line"><a id="l01774" name="l01774"></a><span class="lineno"> 1774</span>    <a class="code hl_define" href="group___c_m_s_i_s___c_o_r_e.html#gac8e97e8ce56ae9f57da1363a937f8a17">NVIC</a>-&gt;ICPR[(((uint32_t)IRQn) &gt;&gt; 5UL)] = (uint32_t)(1UL &lt;&lt; (((uint32_t)IRQn) &amp; 0x1FUL));</div>
<div class="line"><a id="l01775" name="l01775"></a><span class="lineno"> 1775</span>  }</div>
<div class="line"><a id="l01776" name="l01776"></a><span class="lineno"> 1776</span>}</div>
<div class="line"><a id="l01777" name="l01777"></a><span class="lineno"> 1777</span> </div>
<div class="line"><a id="l01778" name="l01778"></a><span class="lineno"> 1778</span></div>
<div class="line"><a id="l01787" name="l01787"></a><span class="lineno"> 1787</span>__STATIC_INLINE uint32_t <a class="code hl_function" href="group___c_m_s_i_s___core___n_v_i_c_functions.html#gaa2837003c28c45abf193fe5e8d27f593">__NVIC_GetActive</a>(<a class="code hl_enumeration" href="group___peripheral__interrupt__number__definition.html#ga7e1129cd8a196f4284d41db3e82ad5c8">IRQn_Type</a> IRQn)</div>
<div class="line"><a id="l01788" name="l01788"></a><span class="lineno"> 1788</span>{</div>
<div class="line"><a id="l01789" name="l01789"></a><span class="lineno"> 1789</span>  <span class="keywordflow">if</span> ((int32_t)(IRQn) &gt;= 0)</div>
<div class="line"><a id="l01790" name="l01790"></a><span class="lineno"> 1790</span>  {</div>
<div class="line"><a id="l01791" name="l01791"></a><span class="lineno"> 1791</span>    <span class="keywordflow">return</span>((uint32_t)(((<a class="code hl_define" href="group___c_m_s_i_s___c_o_r_e.html#gac8e97e8ce56ae9f57da1363a937f8a17">NVIC</a>-&gt;IABR[(((uint32_t)IRQn) &gt;&gt; 5UL)] &amp; (1UL &lt;&lt; (((uint32_t)IRQn) &amp; 0x1FUL))) != 0UL) ? 1UL : 0UL));</div>
<div class="line"><a id="l01792" name="l01792"></a><span class="lineno"> 1792</span>  }</div>
<div class="line"><a id="l01793" name="l01793"></a><span class="lineno"> 1793</span>  <span class="keywordflow">else</span></div>
<div class="line"><a id="l01794" name="l01794"></a><span class="lineno"> 1794</span>  {</div>
<div class="line"><a id="l01795" name="l01795"></a><span class="lineno"> 1795</span>    <span class="keywordflow">return</span>(0U);</div>
<div class="line"><a id="l01796" name="l01796"></a><span class="lineno"> 1796</span>  }</div>
<div class="line"><a id="l01797" name="l01797"></a><span class="lineno"> 1797</span>}</div>
<div class="line"><a id="l01798" name="l01798"></a><span class="lineno"> 1798</span> </div>
<div class="line"><a id="l01799" name="l01799"></a><span class="lineno"> 1799</span></div>
<div class="line"><a id="l01809" name="l01809"></a><span class="lineno"> 1809</span>__STATIC_INLINE <span class="keywordtype">void</span> <a class="code hl_function" href="group___c_m_s_i_s___core___n_v_i_c_functions.html#ga505338e23563a9c074910fb14e7d45fd">__NVIC_SetPriority</a>(<a class="code hl_enumeration" href="group___peripheral__interrupt__number__definition.html#ga7e1129cd8a196f4284d41db3e82ad5c8">IRQn_Type</a> IRQn, uint32_t priority)</div>
<div class="line"><a id="l01810" name="l01810"></a><span class="lineno"> 1810</span>{</div>
<div class="line"><a id="l01811" name="l01811"></a><span class="lineno"> 1811</span>  <span class="keywordflow">if</span> ((int32_t)(IRQn) &gt;= 0)</div>
<div class="line"><a id="l01812" name="l01812"></a><span class="lineno"> 1812</span>  {</div>
<div class="line"><a id="l01813" name="l01813"></a><span class="lineno"> 1813</span>    <a class="code hl_define" href="group___c_m_s_i_s___c_o_r_e.html#gac8e97e8ce56ae9f57da1363a937f8a17">NVIC</a>-&gt;IP[((uint32_t)IRQn)]               = (uint8_t)((priority &lt;&lt; (8U - <a class="code hl_define" href="group___configuration__section__for___c_m_s_i_s.html#gae3fe3587d5100c787e02102ce3944460">__NVIC_PRIO_BITS</a>)) &amp; (uint32_t)0xFFUL);</div>
<div class="line"><a id="l01814" name="l01814"></a><span class="lineno"> 1814</span>  }</div>
<div class="line"><a id="l01815" name="l01815"></a><span class="lineno"> 1815</span>  <span class="keywordflow">else</span></div>
<div class="line"><a id="l01816" name="l01816"></a><span class="lineno"> 1816</span>  {</div>
<div class="line"><a id="l01817" name="l01817"></a><span class="lineno"> 1817</span>    <a class="code hl_define" href="group___c_m_s_i_s___c_o_r_e.html#gaaaf6477c2bde2f00f99e3c2fd1060b01">SCB</a>-&gt;SHP[(((uint32_t)IRQn) &amp; 0xFUL)-4UL] = (uint8_t)((priority &lt;&lt; (8U - <a class="code hl_define" href="group___configuration__section__for___c_m_s_i_s.html#gae3fe3587d5100c787e02102ce3944460">__NVIC_PRIO_BITS</a>)) &amp; (uint32_t)0xFFUL);</div>
<div class="line"><a id="l01818" name="l01818"></a><span class="lineno"> 1818</span>  }</div>
<div class="line"><a id="l01819" name="l01819"></a><span class="lineno"> 1819</span>}</div>
<div class="line"><a id="l01820" name="l01820"></a><span class="lineno"> 1820</span> </div>
<div class="line"><a id="l01821" name="l01821"></a><span class="lineno"> 1821</span></div>
<div class="line"><a id="l01831" name="l01831"></a><span class="lineno"> 1831</span>__STATIC_INLINE uint32_t <a class="code hl_function" href="group___c_m_s_i_s___core___n_v_i_c_functions.html#gaeb9dc99c8e7700668813144261b0bc73">__NVIC_GetPriority</a>(<a class="code hl_enumeration" href="group___peripheral__interrupt__number__definition.html#ga7e1129cd8a196f4284d41db3e82ad5c8">IRQn_Type</a> IRQn)</div>
<div class="line"><a id="l01832" name="l01832"></a><span class="lineno"> 1832</span>{</div>
<div class="line"><a id="l01833" name="l01833"></a><span class="lineno"> 1833</span> </div>
<div class="line"><a id="l01834" name="l01834"></a><span class="lineno"> 1834</span>  <span class="keywordflow">if</span> ((int32_t)(IRQn) &gt;= 0)</div>
<div class="line"><a id="l01835" name="l01835"></a><span class="lineno"> 1835</span>  {</div>
<div class="line"><a id="l01836" name="l01836"></a><span class="lineno"> 1836</span>    <span class="keywordflow">return</span>(((uint32_t)<a class="code hl_define" href="group___c_m_s_i_s___c_o_r_e.html#gac8e97e8ce56ae9f57da1363a937f8a17">NVIC</a>-&gt;IP[((uint32_t)IRQn)]               &gt;&gt; (8U - <a class="code hl_define" href="group___configuration__section__for___c_m_s_i_s.html#gae3fe3587d5100c787e02102ce3944460">__NVIC_PRIO_BITS</a>)));</div>
<div class="line"><a id="l01837" name="l01837"></a><span class="lineno"> 1837</span>  }</div>
<div class="line"><a id="l01838" name="l01838"></a><span class="lineno"> 1838</span>  <span class="keywordflow">else</span></div>
<div class="line"><a id="l01839" name="l01839"></a><span class="lineno"> 1839</span>  {</div>
<div class="line"><a id="l01840" name="l01840"></a><span class="lineno"> 1840</span>    <span class="keywordflow">return</span>(((uint32_t)<a class="code hl_define" href="group___c_m_s_i_s___c_o_r_e.html#gaaaf6477c2bde2f00f99e3c2fd1060b01">SCB</a>-&gt;SHP[(((uint32_t)IRQn) &amp; 0xFUL)-4UL] &gt;&gt; (8U - <a class="code hl_define" href="group___configuration__section__for___c_m_s_i_s.html#gae3fe3587d5100c787e02102ce3944460">__NVIC_PRIO_BITS</a>)));</div>
<div class="line"><a id="l01841" name="l01841"></a><span class="lineno"> 1841</span>  }</div>
<div class="line"><a id="l01842" name="l01842"></a><span class="lineno"> 1842</span>}</div>
<div class="line"><a id="l01843" name="l01843"></a><span class="lineno"> 1843</span> </div>
<div class="line"><a id="l01844" name="l01844"></a><span class="lineno"> 1844</span></div>
<div class="line"><a id="l01856" name="l01856"></a><span class="lineno"> 1856</span>__STATIC_INLINE uint32_t <a class="code hl_function" href="group___c_m_s_i_s___core___n_v_i_c_functions.html#gadb94ac5d892b376e4f3555ae0418ebac">NVIC_EncodePriority</a> (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)</div>
<div class="line"><a id="l01857" name="l01857"></a><span class="lineno"> 1857</span>{</div>
<div class="line"><a id="l01858" name="l01858"></a><span class="lineno"> 1858</span>  uint32_t PriorityGroupTmp = (PriorityGroup &amp; (uint32_t)0x07UL);   <span class="comment">/* only values 0..7 are used          */</span></div>
<div class="line"><a id="l01859" name="l01859"></a><span class="lineno"> 1859</span>  uint32_t PreemptPriorityBits;</div>
<div class="line"><a id="l01860" name="l01860"></a><span class="lineno"> 1860</span>  uint32_t SubPriorityBits;</div>
<div class="line"><a id="l01861" name="l01861"></a><span class="lineno"> 1861</span> </div>
<div class="line"><a id="l01862" name="l01862"></a><span class="lineno"> 1862</span>  PreemptPriorityBits = ((7UL - PriorityGroupTmp) &gt; (uint32_t)(<a class="code hl_define" href="group___configuration__section__for___c_m_s_i_s.html#gae3fe3587d5100c787e02102ce3944460">__NVIC_PRIO_BITS</a>)) ? (uint32_t)(<a class="code hl_define" href="group___configuration__section__for___c_m_s_i_s.html#gae3fe3587d5100c787e02102ce3944460">__NVIC_PRIO_BITS</a>) : (uint32_t)(7UL - PriorityGroupTmp);</div>
<div class="line"><a id="l01863" name="l01863"></a><span class="lineno"> 1863</span>  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(<a class="code hl_define" href="group___configuration__section__for___c_m_s_i_s.html#gae3fe3587d5100c787e02102ce3944460">__NVIC_PRIO_BITS</a>)) &lt; (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(<a class="code hl_define" href="group___configuration__section__for___c_m_s_i_s.html#gae3fe3587d5100c787e02102ce3944460">__NVIC_PRIO_BITS</a>));</div>
<div class="line"><a id="l01864" name="l01864"></a><span class="lineno"> 1864</span> </div>
<div class="line"><a id="l01865" name="l01865"></a><span class="lineno"> 1865</span>  <span class="keywordflow">return</span> (</div>
<div class="line"><a id="l01866" name="l01866"></a><span class="lineno"> 1866</span>           ((PreemptPriority &amp; (uint32_t)((1UL &lt;&lt; (PreemptPriorityBits)) - 1UL)) &lt;&lt; SubPriorityBits) |</div>
<div class="line"><a id="l01867" name="l01867"></a><span class="lineno"> 1867</span>           ((SubPriority     &amp; (uint32_t)((1UL &lt;&lt; (SubPriorityBits    )) - 1UL)))</div>
<div class="line"><a id="l01868" name="l01868"></a><span class="lineno"> 1868</span>         );</div>
<div class="line"><a id="l01869" name="l01869"></a><span class="lineno"> 1869</span>}</div>
<div class="line"><a id="l01870" name="l01870"></a><span class="lineno"> 1870</span> </div>
<div class="line"><a id="l01871" name="l01871"></a><span class="lineno"> 1871</span></div>
<div class="line"><a id="l01883" name="l01883"></a><span class="lineno"> 1883</span>__STATIC_INLINE <span class="keywordtype">void</span> <a class="code hl_function" href="group___c_m_s_i_s___core___n_v_i_c_functions.html#ga3387607fd8a1a32cccd77d2ac672dd96">NVIC_DecodePriority</a> (uint32_t Priority, uint32_t PriorityGroup, uint32_t* <span class="keyword">const</span> pPreemptPriority, uint32_t* <span class="keyword">const</span> pSubPriority)</div>
<div class="line"><a id="l01884" name="l01884"></a><span class="lineno"> 1884</span>{</div>
<div class="line"><a id="l01885" name="l01885"></a><span class="lineno"> 1885</span>  uint32_t PriorityGroupTmp = (PriorityGroup &amp; (uint32_t)0x07UL);   <span class="comment">/* only values 0..7 are used          */</span></div>
<div class="line"><a id="l01886" name="l01886"></a><span class="lineno"> 1886</span>  uint32_t PreemptPriorityBits;</div>
<div class="line"><a id="l01887" name="l01887"></a><span class="lineno"> 1887</span>  uint32_t SubPriorityBits;</div>
<div class="line"><a id="l01888" name="l01888"></a><span class="lineno"> 1888</span> </div>
<div class="line"><a id="l01889" name="l01889"></a><span class="lineno"> 1889</span>  PreemptPriorityBits = ((7UL - PriorityGroupTmp) &gt; (uint32_t)(<a class="code hl_define" href="group___configuration__section__for___c_m_s_i_s.html#gae3fe3587d5100c787e02102ce3944460">__NVIC_PRIO_BITS</a>)) ? (uint32_t)(<a class="code hl_define" href="group___configuration__section__for___c_m_s_i_s.html#gae3fe3587d5100c787e02102ce3944460">__NVIC_PRIO_BITS</a>) : (uint32_t)(7UL - PriorityGroupTmp);</div>
<div class="line"><a id="l01890" name="l01890"></a><span class="lineno"> 1890</span>  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(<a class="code hl_define" href="group___configuration__section__for___c_m_s_i_s.html#gae3fe3587d5100c787e02102ce3944460">__NVIC_PRIO_BITS</a>)) &lt; (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(<a class="code hl_define" href="group___configuration__section__for___c_m_s_i_s.html#gae3fe3587d5100c787e02102ce3944460">__NVIC_PRIO_BITS</a>));</div>
<div class="line"><a id="l01891" name="l01891"></a><span class="lineno"> 1891</span> </div>
<div class="line"><a id="l01892" name="l01892"></a><span class="lineno"> 1892</span>  *pPreemptPriority = (Priority &gt;&gt; SubPriorityBits) &amp; (uint32_t)((1UL &lt;&lt; (PreemptPriorityBits)) - 1UL);</div>
<div class="line"><a id="l01893" name="l01893"></a><span class="lineno"> 1893</span>  *pSubPriority     = (Priority                   ) &amp; (uint32_t)((1UL &lt;&lt; (SubPriorityBits    )) - 1UL);</div>
<div class="line"><a id="l01894" name="l01894"></a><span class="lineno"> 1894</span>}</div>
<div class="line"><a id="l01895" name="l01895"></a><span class="lineno"> 1895</span> </div>
<div class="line"><a id="l01896" name="l01896"></a><span class="lineno"> 1896</span></div>
<div class="line"><a id="l01906" name="l01906"></a><span class="lineno"> 1906</span>__STATIC_INLINE <span class="keywordtype">void</span> <a class="code hl_function" href="group___c_m_s_i_s___core___n_v_i_c_functions.html#ga0df355460bc1783d58f9d72ee4884208">__NVIC_SetVector</a>(<a class="code hl_enumeration" href="group___peripheral__interrupt__number__definition.html#ga7e1129cd8a196f4284d41db3e82ad5c8">IRQn_Type</a> IRQn, uint32_t vector)</div>
<div class="line"><a id="l01907" name="l01907"></a><span class="lineno"> 1907</span>{</div>
<div class="line"><a id="l01908" name="l01908"></a><span class="lineno"> 1908</span>  uint32_t vectors = (uint32_t )<a class="code hl_define" href="group___c_m_s_i_s___c_o_r_e.html#gaaaf6477c2bde2f00f99e3c2fd1060b01">SCB</a>-&gt;VTOR;</div>
<div class="line"><a id="l01909" name="l01909"></a><span class="lineno"> 1909</span>  (* (<span class="keywordtype">int</span> *) (vectors + ((int32_t)IRQn + NVIC_USER_IRQ_OFFSET) * 4)) = vector;</div>
<div class="line"><a id="l01910" name="l01910"></a><span class="lineno"> 1910</span>  <span class="comment">/* ARM Application Note 321 states that the M4 does not require the architectural barrier */</span></div>
<div class="line"><a id="l01911" name="l01911"></a><span class="lineno"> 1911</span>}</div>
<div class="line"><a id="l01912" name="l01912"></a><span class="lineno"> 1912</span> </div>
<div class="line"><a id="l01913" name="l01913"></a><span class="lineno"> 1913</span></div>
<div class="line"><a id="l01922" name="l01922"></a><span class="lineno"> 1922</span>__STATIC_INLINE uint32_t <a class="code hl_function" href="group___c_m_s_i_s___core___n_v_i_c_functions.html#ga44b665d2afb708121d9b10c76ff00ee5">__NVIC_GetVector</a>(<a class="code hl_enumeration" href="group___peripheral__interrupt__number__definition.html#ga7e1129cd8a196f4284d41db3e82ad5c8">IRQn_Type</a> IRQn)</div>
<div class="line"><a id="l01923" name="l01923"></a><span class="lineno"> 1923</span>{</div>
<div class="line"><a id="l01924" name="l01924"></a><span class="lineno"> 1924</span>  uint32_t vectors = (uint32_t )<a class="code hl_define" href="group___c_m_s_i_s___c_o_r_e.html#gaaaf6477c2bde2f00f99e3c2fd1060b01">SCB</a>-&gt;VTOR;</div>
<div class="line"><a id="l01925" name="l01925"></a><span class="lineno"> 1925</span>  <span class="keywordflow">return</span> (uint32_t)(* (<span class="keywordtype">int</span> *) (vectors + ((int32_t)IRQn + NVIC_USER_IRQ_OFFSET) * 4));</div>
<div class="line"><a id="l01926" name="l01926"></a><span class="lineno"> 1926</span>}</div>
<div class="line"><a id="l01927" name="l01927"></a><span class="lineno"> 1927</span> </div>
<div class="line"><a id="l01928" name="l01928"></a><span class="lineno"> 1928</span></div>
<div class="line"><a id="l01933" name="l01933"></a><span class="lineno"> 1933</span>__NO_RETURN __STATIC_INLINE <span class="keywordtype">void</span> <a class="code hl_function" href="group___c_m_s_i_s___core___n_v_i_c_functions.html#ga0d9aa2d30fa54b41eb780c16e35b676c">__NVIC_SystemReset</a>(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l01934" name="l01934"></a><span class="lineno"> 1934</span>{</div>
<div class="line"><a id="l01935" name="l01935"></a><span class="lineno"> 1935</span>  <a class="code hl_define" href="group___c_m_s_i_s___core___instruction_interface.html#ga067d257a2b34565410acefb5afef2203">__DSB</a>();                                                          <span class="comment">/* Ensure all outstanding memory accesses included</span></div>
<div class="line"><a id="l01936" name="l01936"></a><span class="lineno"> 1936</span><span class="comment">                                                                       buffered write are completed before reset */</span></div>
<div class="line"><a id="l01937" name="l01937"></a><span class="lineno"> 1937</span>  <a class="code hl_define" href="group___c_m_s_i_s___c_o_r_e.html#gaaaf6477c2bde2f00f99e3c2fd1060b01">SCB</a>-&gt;AIRCR  = (uint32_t)((0x5FAUL &lt;&lt; <a class="code hl_define" href="group___c_m_s_i_s___c_o_r_e.html#gaaa27c0ba600bf82c3da08c748845b640">SCB_AIRCR_VECTKEY_Pos</a>)    |</div>
<div class="line"><a id="l01938" name="l01938"></a><span class="lineno"> 1938</span>                           (<a class="code hl_define" href="group___c_m_s_i_s___c_o_r_e.html#gaaaf6477c2bde2f00f99e3c2fd1060b01">SCB</a>-&gt;AIRCR &amp; <a class="code hl_define" href="group___c_m_s_i_s___c_o_r_e.html#ga8be60fff03f48d0d345868060dc6dae7">SCB_AIRCR_PRIGROUP_Msk</a>) |</div>
<div class="line"><a id="l01939" name="l01939"></a><span class="lineno"> 1939</span>                            <a class="code hl_define" href="group___c_m_s_i_s___c_o_r_e.html#gaae1181119559a5bd36e62afa373fa720">SCB_AIRCR_SYSRESETREQ_Msk</a>    );         <span class="comment">/* Keep priority group unchanged */</span></div>
<div class="line"><a id="l01940" name="l01940"></a><span class="lineno"> 1940</span>  <a class="code hl_define" href="group___c_m_s_i_s___core___instruction_interface.html#ga067d257a2b34565410acefb5afef2203">__DSB</a>();                                                          <span class="comment">/* Ensure completion of memory access */</span></div>
<div class="line"><a id="l01941" name="l01941"></a><span class="lineno"> 1941</span> </div>
<div class="line"><a id="l01942" name="l01942"></a><span class="lineno"> 1942</span>  <span class="keywordflow">for</span>(;;)                                                           <span class="comment">/* wait until reset */</span></div>
<div class="line"><a id="l01943" name="l01943"></a><span class="lineno"> 1943</span>  {</div>
<div class="line"><a id="l01944" name="l01944"></a><span class="lineno"> 1944</span>    <a class="code hl_define" href="group___c_m_s_i_s___core___instruction_interface.html#gabd585ddc865fb9b7f2493af1eee1a572">__NOP</a>();</div>
<div class="line"><a id="l01945" name="l01945"></a><span class="lineno"> 1945</span>  }</div>
<div class="line"><a id="l01946" name="l01946"></a><span class="lineno"> 1946</span>}</div>
<div class="line"><a id="l01947" name="l01947"></a><span class="lineno"> 1947</span></div>
<div class="line"><a id="l01949" name="l01949"></a><span class="lineno"> 1949</span> </div>
<div class="line"><a id="l01950" name="l01950"></a><span class="lineno"> 1950</span> </div>
<div class="line"><a id="l01951" name="l01951"></a><span class="lineno"> 1951</span><span class="comment">/* ##########################  MPU functions  #################################### */</span></div>
<div class="line"><a id="l01952" name="l01952"></a><span class="lineno"> 1952</span> </div>
<div class="line"><a id="l01953" name="l01953"></a><span class="lineno"> 1953</span><span class="preprocessor">#if defined (__MPU_PRESENT) &amp;&amp; (__MPU_PRESENT == 1U)</span></div>
<div class="line"><a id="l01954" name="l01954"></a><span class="lineno"> 1954</span> </div>
<div class="line"><a id="l01955" name="l01955"></a><span class="lineno"> 1955</span><span class="preprocessor">#include &quot;mpu_armv7.h&quot;</span></div>
<div class="line"><a id="l01956" name="l01956"></a><span class="lineno"> 1956</span> </div>
<div class="line"><a id="l01957" name="l01957"></a><span class="lineno"> 1957</span><span class="preprocessor">#endif</span></div>
<div class="line"><a id="l01958" name="l01958"></a><span class="lineno"> 1958</span> </div>
<div class="line"><a id="l01959" name="l01959"></a><span class="lineno"> 1959</span> </div>
<div class="line"><a id="l01960" name="l01960"></a><span class="lineno"> 1960</span><span class="comment">/* ##########################  FPU functions  #################################### */</span></div>
<div class="line"><a id="l01967" name="l01967"></a><span class="lineno"> 1967</span></div>
<div class="line"><a id="l01976" name="l01976"></a><span class="lineno"> 1976</span>__STATIC_INLINE uint32_t <a class="code hl_function" href="group___c_m_s_i_s___core___n_v_i_c_functions.html#ga6bcad99ce80a0e7e4ddc6f2379081756">SCB_GetFPUType</a>(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l01977" name="l01977"></a><span class="lineno"> 1977</span>{</div>
<div class="line"><a id="l01978" name="l01978"></a><span class="lineno"> 1978</span>  uint32_t mvfr0;</div>
<div class="line"><a id="l01979" name="l01979"></a><span class="lineno"> 1979</span> </div>
<div class="line"><a id="l01980" name="l01980"></a><span class="lineno"> 1980</span>  mvfr0 = <a class="code hl_define" href="group___c_m_s_i_s___c_o_r_e.html#gabc7c93f2594e85ece1e1a24f10591428">FPU</a>-&gt;MVFR0;</div>
<div class="line"><a id="l01981" name="l01981"></a><span class="lineno"> 1981</span>  <span class="keywordflow">if</span>      ((mvfr0 &amp; (<a class="code hl_define" href="group___c_m_s_i_s___c_o_r_e.html#ga95008f205c9d25e4ffebdbdc50d5ae44">FPU_MVFR0_Single_precision_Msk</a> | <a class="code hl_define" href="group___c_m_s_i_s___c_o_r_e.html#ga3f2c8c6c759ffe70f548a165602ea901">FPU_MVFR0_Double_precision_Msk</a>)) == 0x020U)</div>
<div class="line"><a id="l01982" name="l01982"></a><span class="lineno"> 1982</span>  {</div>
<div class="line"><a id="l01983" name="l01983"></a><span class="lineno"> 1983</span>    <span class="keywordflow">return</span> 1U;           <span class="comment">/* Single precision FPU */</span></div>
<div class="line"><a id="l01984" name="l01984"></a><span class="lineno"> 1984</span>  }</div>
<div class="line"><a id="l01985" name="l01985"></a><span class="lineno"> 1985</span>  <span class="keywordflow">else</span></div>
<div class="line"><a id="l01986" name="l01986"></a><span class="lineno"> 1986</span>  {</div>
<div class="line"><a id="l01987" name="l01987"></a><span class="lineno"> 1987</span>    <span class="keywordflow">return</span> 0U;           <span class="comment">/* No FPU */</span></div>
<div class="line"><a id="l01988" name="l01988"></a><span class="lineno"> 1988</span>  }</div>
<div class="line"><a id="l01989" name="l01989"></a><span class="lineno"> 1989</span>}</div>
<div class="line"><a id="l01990" name="l01990"></a><span class="lineno"> 1990</span> </div>
<div class="line"><a id="l01991" name="l01991"></a><span class="lineno"> 1991</span></div>
<div class="line"><a id="l01993" name="l01993"></a><span class="lineno"> 1993</span> </div>
<div class="line"><a id="l01994" name="l01994"></a><span class="lineno"> 1994</span> </div>
<div class="line"><a id="l01995" name="l01995"></a><span class="lineno"> 1995</span> </div>
<div class="line"><a id="l01996" name="l01996"></a><span class="lineno"> 1996</span><span class="comment">/* ##################################    SysTick function  ############################################ */</span></div>
<div class="line"><a id="l02003" name="l02003"></a><span class="lineno"> 2003</span> </div>
<div class="line"><a id="l02004" name="l02004"></a><span class="lineno"> 2004</span><span class="preprocessor">#if defined (__Vendor_SysTickConfig) &amp;&amp; (__Vendor_SysTickConfig == 0U)</span></div>
<div class="line"><a id="l02005" name="l02005"></a><span class="lineno"> 2005</span></div>
<div class="line"><a id="l02017" name="l02017"></a><span class="lineno"> 2017</span>__STATIC_INLINE uint32_t <a class="code hl_function" href="group___c_m_s_i_s___core___n_v_i_c_functions.html#gae4e8f0238527c69f522029b93c8e5b78">SysTick_Config</a>(uint32_t ticks)</div>
<div class="line"><a id="l02018" name="l02018"></a><span class="lineno"> 2018</span>{</div>
<div class="line"><a id="l02019" name="l02019"></a><span class="lineno"> 2019</span>  <span class="keywordflow">if</span> ((ticks - 1UL) &gt; <a class="code hl_define" href="group___c_m_s_i_s___c_o_r_e.html#ga265912a7962f0e1abd170336e579b1b1">SysTick_LOAD_RELOAD_Msk</a>)</div>
<div class="line"><a id="l02020" name="l02020"></a><span class="lineno"> 2020</span>  {</div>
<div class="line"><a id="l02021" name="l02021"></a><span class="lineno"> 2021</span>    <span class="keywordflow">return</span> (1UL);                                                   <span class="comment">/* Reload value impossible */</span></div>
<div class="line"><a id="l02022" name="l02022"></a><span class="lineno"> 2022</span>  }</div>
<div class="line"><a id="l02023" name="l02023"></a><span class="lineno"> 2023</span> </div>
<div class="line"><a id="l02024" name="l02024"></a><span class="lineno"> 2024</span>  <a class="code hl_define" href="group___c_m_s_i_s___c_o_r_e.html#gacd96c53beeaff8f603fcda425eb295de">SysTick</a>-&gt;LOAD  = (uint32_t)(ticks - 1UL);                         <span class="comment">/* set reload register */</span></div>
<div class="line"><a id="l02025" name="l02025"></a><span class="lineno"> 2025</span>  NVIC_SetPriority (<a class="code hl_enumvalue" href="group___peripheral__interrupt__number__definition.html#gga7e1129cd8a196f4284d41db3e82ad5c8a6dbff8f8543325f3474cbae2446776e7">SysTick_IRQn</a>, (1UL &lt;&lt; <a class="code hl_define" href="group___configuration__section__for___c_m_s_i_s.html#gae3fe3587d5100c787e02102ce3944460">__NVIC_PRIO_BITS</a>) - 1UL); <span class="comment">/* set Priority for Systick Interrupt */</span></div>
<div class="line"><a id="l02026" name="l02026"></a><span class="lineno"> 2026</span>  <a class="code hl_define" href="group___c_m_s_i_s___c_o_r_e.html#gacd96c53beeaff8f603fcda425eb295de">SysTick</a>-&gt;VAL   = 0UL;                                             <span class="comment">/* Load the SysTick Counter Value */</span></div>
<div class="line"><a id="l02027" name="l02027"></a><span class="lineno"> 2027</span>  <a class="code hl_define" href="group___c_m_s_i_s___c_o_r_e.html#gacd96c53beeaff8f603fcda425eb295de">SysTick</a>-&gt;CTRL  = <a class="code hl_define" href="group___c_m_s_i_s___c_o_r_e.html#gaa41d06039797423a46596bd313d57373">SysTick_CTRL_CLKSOURCE_Msk</a> |</div>
<div class="line"><a id="l02028" name="l02028"></a><span class="lineno"> 2028</span>                   <a class="code hl_define" href="group___c_m_s_i_s___c_o_r_e.html#ga95bb984266ca764024836a870238a027">SysTick_CTRL_TICKINT_Msk</a>   |</div>
<div class="line"><a id="l02029" name="l02029"></a><span class="lineno"> 2029</span>                   <a class="code hl_define" href="group___c_m_s_i_s___c_o_r_e.html#ga16c9fee0ed0235524bdeb38af328fd1f">SysTick_CTRL_ENABLE_Msk</a>;                         <span class="comment">/* Enable SysTick IRQ and SysTick Timer */</span></div>
<div class="line"><a id="l02030" name="l02030"></a><span class="lineno"> 2030</span>  <span class="keywordflow">return</span> (0UL);                                                     <span class="comment">/* Function successful */</span></div>
<div class="line"><a id="l02031" name="l02031"></a><span class="lineno"> 2031</span>}</div>
<div class="line"><a id="l02032" name="l02032"></a><span class="lineno"> 2032</span> </div>
<div class="line"><a id="l02033" name="l02033"></a><span class="lineno"> 2033</span><span class="preprocessor">#endif</span></div>
<div class="line"><a id="l02034" name="l02034"></a><span class="lineno"> 2034</span></div>
<div class="line"><a id="l02036" name="l02036"></a><span class="lineno"> 2036</span> </div>
<div class="line"><a id="l02037" name="l02037"></a><span class="lineno"> 2037</span> </div>
<div class="line"><a id="l02038" name="l02038"></a><span class="lineno"> 2038</span> </div>
<div class="line"><a id="l02039" name="l02039"></a><span class="lineno"> 2039</span><span class="comment">/* ##################################### Debug In/Output function ########################################### */</span></div>
<div class="line"><a id="l02046" name="l02046"></a><span class="lineno"> 2046</span> </div>
<div class="line"><a id="l02047" name="l02047"></a><span class="lineno"> 2047</span><span class="keyword">extern</span> <span class="keyword">volatile</span> int32_t <a class="code hl_variable" href="group___c_m_s_i_s__core___debug_functions.html#ga12e68e55a7badc271b948d6c7230b2a8">ITM_RxBuffer</a>;                              </div>
<div class="line"><a id="l02048" name="l02048"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s__core___debug_functions.html#gaa822cb398ee022b59e9e6c5d7bbb228a"> 2048</a></span><span class="preprocessor">#define                 ITM_RXBUFFER_EMPTY  ((int32_t)0x5AA55AA5U) </span><span class="preprocessor"></span></div>
<div class="line"><a id="l02049" name="l02049"></a><span class="lineno"> 2049</span> </div>
<div class="line"><a id="l02050" name="l02050"></a><span class="lineno"> 2050</span></div>
<div class="line"><a id="l02059" name="l02059"></a><span class="lineno"> 2059</span>__STATIC_INLINE uint32_t <a class="code hl_function" href="group___c_m_s_i_s__core___debug_functions.html#gac90a497bd64286b84552c2c553d3419e">ITM_SendChar</a> (uint32_t ch)</div>
<div class="line"><a id="l02060" name="l02060"></a><span class="lineno"> 2060</span>{</div>
<div class="line"><a id="l02061" name="l02061"></a><span class="lineno"> 2061</span>  <span class="keywordflow">if</span> (((<a class="code hl_define" href="group___c_m_s_i_s___c_o_r_e.html#gabae7cdf882def602cb787bb039ff6a43">ITM</a>-&gt;TCR &amp; <a class="code hl_define" href="group___c_m_s_i_s___c_o_r_e.html#ga7dd53e3bff24ac09d94e61cb595cb2d9">ITM_TCR_ITMENA_Msk</a>) != 0UL) &amp;&amp;      <span class="comment">/* ITM enabled */</span></div>
<div class="line"><a id="l02062" name="l02062"></a><span class="lineno"> 2062</span>      ((<a class="code hl_define" href="group___c_m_s_i_s___c_o_r_e.html#gabae7cdf882def602cb787bb039ff6a43">ITM</a>-&gt;TER &amp; 1UL               ) != 0UL)   )     <span class="comment">/* ITM Port #0 enabled */</span></div>
<div class="line"><a id="l02063" name="l02063"></a><span class="lineno"> 2063</span>  {</div>
<div class="line"><a id="l02064" name="l02064"></a><span class="lineno"> 2064</span>    <span class="keywordflow">while</span> (<a class="code hl_define" href="group___c_m_s_i_s___c_o_r_e.html#gabae7cdf882def602cb787bb039ff6a43">ITM</a>-&gt;PORT[0U].u32 == 0UL)</div>
<div class="line"><a id="l02065" name="l02065"></a><span class="lineno"> 2065</span>    {</div>
<div class="line"><a id="l02066" name="l02066"></a><span class="lineno"> 2066</span>      <a class="code hl_define" href="group___c_m_s_i_s___core___instruction_interface.html#gabd585ddc865fb9b7f2493af1eee1a572">__NOP</a>();</div>
<div class="line"><a id="l02067" name="l02067"></a><span class="lineno"> 2067</span>    }</div>
<div class="line"><a id="l02068" name="l02068"></a><span class="lineno"> 2068</span>    <a class="code hl_define" href="group___c_m_s_i_s___c_o_r_e.html#gabae7cdf882def602cb787bb039ff6a43">ITM</a>-&gt;PORT[0U].u8 = (uint8_t)ch;</div>
<div class="line"><a id="l02069" name="l02069"></a><span class="lineno"> 2069</span>  }</div>
<div class="line"><a id="l02070" name="l02070"></a><span class="lineno"> 2070</span>  <span class="keywordflow">return</span> (ch);</div>
<div class="line"><a id="l02071" name="l02071"></a><span class="lineno"> 2071</span>}</div>
<div class="line"><a id="l02072" name="l02072"></a><span class="lineno"> 2072</span> </div>
<div class="line"><a id="l02073" name="l02073"></a><span class="lineno"> 2073</span></div>
<div class="line"><a id="l02080" name="l02080"></a><span class="lineno"> 2080</span>__STATIC_INLINE int32_t <a class="code hl_function" href="group___c_m_s_i_s__core___debug_functions.html#gac3ee2c30a1ac4ed34c8a866a17decd53">ITM_ReceiveChar</a> (<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l02081" name="l02081"></a><span class="lineno"> 2081</span>{</div>
<div class="line"><a id="l02082" name="l02082"></a><span class="lineno"> 2082</span>  int32_t ch = -1;                           <span class="comment">/* no character available */</span></div>
<div class="line"><a id="l02083" name="l02083"></a><span class="lineno"> 2083</span> </div>
<div class="line"><a id="l02084" name="l02084"></a><span class="lineno"> 2084</span>  <span class="keywordflow">if</span> (<a class="code hl_variable" href="group___c_m_s_i_s__core___debug_functions.html#ga12e68e55a7badc271b948d6c7230b2a8">ITM_RxBuffer</a> != <a class="code hl_define" href="group___c_m_s_i_s__core___debug_functions.html#gaa822cb398ee022b59e9e6c5d7bbb228a">ITM_RXBUFFER_EMPTY</a>)</div>
<div class="line"><a id="l02085" name="l02085"></a><span class="lineno"> 2085</span>  {</div>
<div class="line"><a id="l02086" name="l02086"></a><span class="lineno"> 2086</span>    ch = <a class="code hl_variable" href="group___c_m_s_i_s__core___debug_functions.html#ga12e68e55a7badc271b948d6c7230b2a8">ITM_RxBuffer</a>;</div>
<div class="line"><a id="l02087" name="l02087"></a><span class="lineno"> 2087</span>    <a class="code hl_variable" href="group___c_m_s_i_s__core___debug_functions.html#ga12e68e55a7badc271b948d6c7230b2a8">ITM_RxBuffer</a> = <a class="code hl_define" href="group___c_m_s_i_s__core___debug_functions.html#gaa822cb398ee022b59e9e6c5d7bbb228a">ITM_RXBUFFER_EMPTY</a>;       <span class="comment">/* ready for next character */</span></div>
<div class="line"><a id="l02088" name="l02088"></a><span class="lineno"> 2088</span>  }</div>
<div class="line"><a id="l02089" name="l02089"></a><span class="lineno"> 2089</span> </div>
<div class="line"><a id="l02090" name="l02090"></a><span class="lineno"> 2090</span>  <span class="keywordflow">return</span> (ch);</div>
<div class="line"><a id="l02091" name="l02091"></a><span class="lineno"> 2091</span>}</div>
<div class="line"><a id="l02092" name="l02092"></a><span class="lineno"> 2092</span> </div>
<div class="line"><a id="l02093" name="l02093"></a><span class="lineno"> 2093</span></div>
<div class="line"><a id="l02100" name="l02100"></a><span class="lineno"> 2100</span>__STATIC_INLINE int32_t <a class="code hl_function" href="group___c_m_s_i_s__core___debug_functions.html#gae61ce9ca5917735325cd93b0fb21dd29">ITM_CheckChar</a> (<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l02101" name="l02101"></a><span class="lineno"> 2101</span>{</div>
<div class="line"><a id="l02102" name="l02102"></a><span class="lineno"> 2102</span> </div>
<div class="line"><a id="l02103" name="l02103"></a><span class="lineno"> 2103</span>  <span class="keywordflow">if</span> (<a class="code hl_variable" href="group___c_m_s_i_s__core___debug_functions.html#ga12e68e55a7badc271b948d6c7230b2a8">ITM_RxBuffer</a> == <a class="code hl_define" href="group___c_m_s_i_s__core___debug_functions.html#gaa822cb398ee022b59e9e6c5d7bbb228a">ITM_RXBUFFER_EMPTY</a>)</div>
<div class="line"><a id="l02104" name="l02104"></a><span class="lineno"> 2104</span>  {</div>
<div class="line"><a id="l02105" name="l02105"></a><span class="lineno"> 2105</span>    <span class="keywordflow">return</span> (0);                              <span class="comment">/* no character available */</span></div>
<div class="line"><a id="l02106" name="l02106"></a><span class="lineno"> 2106</span>  }</div>
<div class="line"><a id="l02107" name="l02107"></a><span class="lineno"> 2107</span>  <span class="keywordflow">else</span></div>
<div class="line"><a id="l02108" name="l02108"></a><span class="lineno"> 2108</span>  {</div>
<div class="line"><a id="l02109" name="l02109"></a><span class="lineno"> 2109</span>    <span class="keywordflow">return</span> (1);                              <span class="comment">/*    character available */</span></div>
<div class="line"><a id="l02110" name="l02110"></a><span class="lineno"> 2110</span>  }</div>
<div class="line"><a id="l02111" name="l02111"></a><span class="lineno"> 2111</span>}</div>
<div class="line"><a id="l02112" name="l02112"></a><span class="lineno"> 2112</span></div>
<div class="line"><a id="l02114" name="l02114"></a><span class="lineno"> 2114</span> </div>
<div class="line"><a id="l02115" name="l02115"></a><span class="lineno"> 2115</span> </div>
<div class="line"><a id="l02116" name="l02116"></a><span class="lineno"> 2116</span> </div>
<div class="line"><a id="l02117" name="l02117"></a><span class="lineno"> 2117</span> </div>
<div class="line"><a id="l02118" name="l02118"></a><span class="lineno"> 2118</span><span class="preprocessor">#ifdef __cplusplus</span></div>
<div class="line"><a id="l02119" name="l02119"></a><span class="lineno"> 2119</span>}</div>
<div class="line"><a id="l02120" name="l02120"></a><span class="lineno"> 2120</span><span class="preprocessor">#endif</span></div>
<div class="line"><a id="l02121" name="l02121"></a><span class="lineno"> 2121</span> </div>
<div class="line"><a id="l02122" name="l02122"></a><span class="lineno"> 2122</span><span class="preprocessor">#endif </span><span class="comment">/* __CORE_CM4_H_DEPENDANT */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l02123" name="l02123"></a><span class="lineno"> 2123</span> </div>
<div class="line"><a id="l02124" name="l02124"></a><span class="lineno"> 2124</span><span class="preprocessor">#endif </span><span class="comment">/* __CMSIS_GENERIC */</span><span class="preprocessor"></span></div>
<div class="ttc" id="acmsis__compiler_8h_html"><div class="ttname"><a href="cmsis__compiler_8h.html">cmsis_compiler.h</a></div><div class="ttdoc">CMSIS compiler generic header file.</div></div>
<div class="ttc" id="acmsis__version_8h_html"><div class="ttname"><a href="cmsis__version_8h.html">cmsis_version.h</a></div><div class="ttdoc">CMSIS Core(M) Version definitions.</div></div>
<div class="ttc" id="agroup___c_m_s_i_s___c_o_r_e_html_ga16c9fee0ed0235524bdeb38af328fd1f"><div class="ttname"><a href="group___c_m_s_i_s___c_o_r_e.html#ga16c9fee0ed0235524bdeb38af328fd1f">SysTick_CTRL_ENABLE_Msk</a></div><div class="ttdeci">#define SysTick_CTRL_ENABLE_Msk</div><div class="ttdef"><b>Definition</b> core_armv81mml.h:1054</div></div>
<div class="ttc" id="agroup___c_m_s_i_s___c_o_r_e_html_ga265912a7962f0e1abd170336e579b1b1"><div class="ttname"><a href="group___c_m_s_i_s___c_o_r_e.html#ga265912a7962f0e1abd170336e579b1b1">SysTick_LOAD_RELOAD_Msk</a></div><div class="ttdeci">#define SysTick_LOAD_RELOAD_Msk</div><div class="ttdef"><b>Definition</b> core_armv81mml.h:1058</div></div>
<div class="ttc" id="agroup___c_m_s_i_s___c_o_r_e_html_ga3f2c8c6c759ffe70f548a165602ea901"><div class="ttname"><a href="group___c_m_s_i_s___c_o_r_e.html#ga3f2c8c6c759ffe70f548a165602ea901">FPU_MVFR0_Double_precision_Msk</a></div><div class="ttdeci">#define FPU_MVFR0_Double_precision_Msk</div><div class="ttdef"><b>Definition</b> core_armv81mml.h:1842</div></div>
<div class="ttc" id="agroup___c_m_s_i_s___c_o_r_e_html_ga7dd53e3bff24ac09d94e61cb595cb2d9"><div class="ttname"><a href="group___c_m_s_i_s___c_o_r_e.html#ga7dd53e3bff24ac09d94e61cb595cb2d9">ITM_TCR_ITMENA_Msk</a></div><div class="ttdeci">#define ITM_TCR_ITMENA_Msk</div><div class="ttdef"><b>Definition</b> core_armv81mml.h:1165</div></div>
<div class="ttc" id="agroup___c_m_s_i_s___c_o_r_e_html_ga8be60fff03f48d0d345868060dc6dae7"><div class="ttname"><a href="group___c_m_s_i_s___c_o_r_e.html#ga8be60fff03f48d0d345868060dc6dae7">SCB_AIRCR_PRIGROUP_Msk</a></div><div class="ttdeci">#define SCB_AIRCR_PRIGROUP_Msk</div><div class="ttdef"><b>Definition</b> core_armv81mml.h:629</div></div>
<div class="ttc" id="agroup___c_m_s_i_s___c_o_r_e_html_ga90c7cf0c490e7ae55f9503a7fda1dd22"><div class="ttname"><a href="group___c_m_s_i_s___c_o_r_e.html#ga90c7cf0c490e7ae55f9503a7fda1dd22">SCB_AIRCR_VECTKEY_Msk</a></div><div class="ttdeci">#define SCB_AIRCR_VECTKEY_Msk</div><div class="ttdef"><b>Definition</b> core_armv81mml.h:614</div></div>
<div class="ttc" id="agroup___c_m_s_i_s___c_o_r_e_html_ga95008f205c9d25e4ffebdbdc50d5ae44"><div class="ttname"><a href="group___c_m_s_i_s___c_o_r_e.html#ga95008f205c9d25e4ffebdbdc50d5ae44">FPU_MVFR0_Single_precision_Msk</a></div><div class="ttdeci">#define FPU_MVFR0_Single_precision_Msk</div><div class="ttdef"><b>Definition</b> core_armv81mml.h:1845</div></div>
<div class="ttc" id="agroup___c_m_s_i_s___c_o_r_e_html_ga95bb984266ca764024836a870238a027"><div class="ttname"><a href="group___c_m_s_i_s___c_o_r_e.html#ga95bb984266ca764024836a870238a027">SysTick_CTRL_TICKINT_Msk</a></div><div class="ttdeci">#define SysTick_CTRL_TICKINT_Msk</div><div class="ttdef"><b>Definition</b> core_armv81mml.h:1051</div></div>
<div class="ttc" id="agroup___c_m_s_i_s___c_o_r_e_html_gaa41d06039797423a46596bd313d57373"><div class="ttname"><a href="group___c_m_s_i_s___c_o_r_e.html#gaa41d06039797423a46596bd313d57373">SysTick_CTRL_CLKSOURCE_Msk</a></div><div class="ttdeci">#define SysTick_CTRL_CLKSOURCE_Msk</div><div class="ttdef"><b>Definition</b> core_armv81mml.h:1048</div></div>
<div class="ttc" id="agroup___c_m_s_i_s___c_o_r_e_html_gaaa27c0ba600bf82c3da08c748845b640"><div class="ttname"><a href="group___c_m_s_i_s___c_o_r_e.html#gaaa27c0ba600bf82c3da08c748845b640">SCB_AIRCR_VECTKEY_Pos</a></div><div class="ttdeci">#define SCB_AIRCR_VECTKEY_Pos</div><div class="ttdef"><b>Definition</b> core_armv81mml.h:613</div></div>
<div class="ttc" id="agroup___c_m_s_i_s___c_o_r_e_html_gaaaf6477c2bde2f00f99e3c2fd1060b01"><div class="ttname"><a href="group___c_m_s_i_s___c_o_r_e.html#gaaaf6477c2bde2f00f99e3c2fd1060b01">SCB</a></div><div class="ttdeci">#define SCB</div><div class="ttdef"><b>Definition</b> core_armv81mml.h:2044</div></div>
<div class="ttc" id="agroup___c_m_s_i_s___c_o_r_e_html_gaae1181119559a5bd36e62afa373fa720"><div class="ttname"><a href="group___c_m_s_i_s___c_o_r_e.html#gaae1181119559a5bd36e62afa373fa720">SCB_AIRCR_SYSRESETREQ_Msk</a></div><div class="ttdeci">#define SCB_AIRCR_SYSRESETREQ_Msk</div><div class="ttdef"><b>Definition</b> core_armv81mml.h:635</div></div>
<div class="ttc" id="agroup___c_m_s_i_s___c_o_r_e_html_gabae7cdf882def602cb787bb039ff6a43"><div class="ttname"><a href="group___c_m_s_i_s___c_o_r_e.html#gabae7cdf882def602cb787bb039ff6a43">ITM</a></div><div class="ttdeci">#define ITM</div><div class="ttdef"><b>Definition</b> core_armv81mml.h:2047</div></div>
<div class="ttc" id="agroup___c_m_s_i_s___c_o_r_e_html_gabc7c93f2594e85ece1e1a24f10591428"><div class="ttname"><a href="group___c_m_s_i_s___c_o_r_e.html#gabc7c93f2594e85ece1e1a24f10591428">FPU</a></div><div class="ttdeci">#define FPU</div><div class="ttdef"><b>Definition</b> core_armv81mml.h:2063</div></div>
<div class="ttc" id="agroup___c_m_s_i_s___c_o_r_e_html_gac8e97e8ce56ae9f57da1363a937f8a17"><div class="ttname"><a href="group___c_m_s_i_s___c_o_r_e.html#gac8e97e8ce56ae9f57da1363a937f8a17">NVIC</a></div><div class="ttdeci">#define NVIC</div><div class="ttdef"><b>Definition</b> core_armv81mml.h:2046</div></div>
<div class="ttc" id="agroup___c_m_s_i_s___c_o_r_e_html_gaca155deccdeca0f2c76b8100d24196c8"><div class="ttname"><a href="group___c_m_s_i_s___c_o_r_e.html#gaca155deccdeca0f2c76b8100d24196c8">SCB_AIRCR_PRIGROUP_Pos</a></div><div class="ttdeci">#define SCB_AIRCR_PRIGROUP_Pos</div><div class="ttdef"><b>Definition</b> core_armv81mml.h:628</div></div>
<div class="ttc" id="agroup___c_m_s_i_s___c_o_r_e_html_gacd96c53beeaff8f603fcda425eb295de"><div class="ttname"><a href="group___c_m_s_i_s___c_o_r_e.html#gacd96c53beeaff8f603fcda425eb295de">SysTick</a></div><div class="ttdeci">#define SysTick</div><div class="ttdef"><b>Definition</b> core_armv81mml.h:2045</div></div>
<div class="ttc" id="agroup___c_m_s_i_s___core___instruction_interface_html_ga067d257a2b34565410acefb5afef2203"><div class="ttname"><a href="group___c_m_s_i_s___core___instruction_interface.html#ga067d257a2b34565410acefb5afef2203">__DSB</a></div><div class="ttdeci">#define __DSB()</div><div class="ttdoc">Data Synchronization Barrier.</div><div class="ttdef"><b>Definition</b> cmsis_armcc.h:458</div></div>
<div class="ttc" id="agroup___c_m_s_i_s___core___instruction_interface_html_gaad233022e850a009fc6f7602be1182f6"><div class="ttname"><a href="group___c_m_s_i_s___core___instruction_interface.html#gaad233022e850a009fc6f7602be1182f6">__ISB</a></div><div class="ttdeci">#define __ISB()</div><div class="ttdoc">Instruction Synchronization Barrier.</div><div class="ttdef"><b>Definition</b> cmsis_armcc.h:447</div></div>
<div class="ttc" id="agroup___c_m_s_i_s___core___instruction_interface_html_gabd585ddc865fb9b7f2493af1eee1a572"><div class="ttname"><a href="group___c_m_s_i_s___core___instruction_interface.html#gabd585ddc865fb9b7f2493af1eee1a572">__NOP</a></div><div class="ttdeci">#define __NOP</div><div class="ttdoc">No Operation.</div><div class="ttdef"><b>Definition</b> cmsis_armcc.h:416</div></div>
<div class="ttc" id="agroup___c_m_s_i_s___core___n_v_i_c_functions_html_ga0d9aa2d30fa54b41eb780c16e35b676c"><div class="ttname"><a href="group___c_m_s_i_s___core___n_v_i_c_functions.html#ga0d9aa2d30fa54b41eb780c16e35b676c">__NVIC_SystemReset</a></div><div class="ttdeci">__NO_RETURN __STATIC_INLINE void __NVIC_SystemReset(void)</div><div class="ttdoc">System Reset.</div><div class="ttdef"><b>Definition</b> core_armv81mml.h:2506</div></div>
<div class="ttc" id="agroup___c_m_s_i_s___core___n_v_i_c_functions_html_ga0df355460bc1783d58f9d72ee4884208"><div class="ttname"><a href="group___c_m_s_i_s___core___n_v_i_c_functions.html#ga0df355460bc1783d58f9d72ee4884208">__NVIC_SetVector</a></div><div class="ttdeci">__STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector)</div><div class="ttdoc">Set Interrupt Vector.</div><div class="ttdef"><b>Definition</b> core_armv81mml.h:2479</div></div>
<div class="ttc" id="agroup___c_m_s_i_s___core___n_v_i_c_functions_html_ga3387607fd8a1a32cccd77d2ac672dd96"><div class="ttname"><a href="group___c_m_s_i_s___core___n_v_i_c_functions.html#ga3387607fd8a1a32cccd77d2ac672dd96">NVIC_DecodePriority</a></div><div class="ttdeci">__STATIC_INLINE void NVIC_DecodePriority(uint32_t Priority, uint32_t PriorityGroup, uint32_t *const pPreemptPriority, uint32_t *const pSubPriority)</div><div class="ttdoc">Decode Priority.</div><div class="ttdef"><b>Definition</b> core_armv81mml.h:2456</div></div>
<div class="ttc" id="agroup___c_m_s_i_s___core___n_v_i_c_functions_html_ga44b665d2afb708121d9b10c76ff00ee5"><div class="ttname"><a href="group___c_m_s_i_s___core___n_v_i_c_functions.html#ga44b665d2afb708121d9b10c76ff00ee5">__NVIC_GetVector</a></div><div class="ttdeci">__STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn)</div><div class="ttdoc">Get Interrupt Vector.</div><div class="ttdef"><b>Definition</b> core_armv81mml.h:2495</div></div>
<div class="ttc" id="agroup___c_m_s_i_s___core___n_v_i_c_functions_html_ga505338e23563a9c074910fb14e7d45fd"><div class="ttname"><a href="group___c_m_s_i_s___core___n_v_i_c_functions.html#ga505338e23563a9c074910fb14e7d45fd">__NVIC_SetPriority</a></div><div class="ttdeci">__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)</div><div class="ttdoc">Set Interrupt Priority.</div><div class="ttdef"><b>Definition</b> core_armv81mml.h:2382</div></div>
<div class="ttc" id="agroup___c_m_s_i_s___core___n_v_i_c_functions_html_ga562a86dbdf14827d0fee8fdafb04d191"><div class="ttname"><a href="group___c_m_s_i_s___core___n_v_i_c_functions.html#ga562a86dbdf14827d0fee8fdafb04d191">__NVIC_ClearPendingIRQ</a></div><div class="ttdeci">__STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn)</div><div class="ttdoc">Clear Pending Interrupt.</div><div class="ttdef"><b>Definition</b> core_armv81mml.h:2276</div></div>
<div class="ttc" id="agroup___c_m_s_i_s___core___n_v_i_c_functions_html_ga5a92ca5fa801ad7adb92be7257ab9694"><div class="ttname"><a href="group___c_m_s_i_s___core___n_v_i_c_functions.html#ga5a92ca5fa801ad7adb92be7257ab9694">__NVIC_GetPendingIRQ</a></div><div class="ttdeci">__STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn)</div><div class="ttdoc">Get Pending Interrupt.</div><div class="ttdef"><b>Definition</b> core_armv81mml.h:2242</div></div>
<div class="ttc" id="agroup___c_m_s_i_s___core___n_v_i_c_functions_html_ga6bcad99ce80a0e7e4ddc6f2379081756"><div class="ttname"><a href="group___c_m_s_i_s___core___n_v_i_c_functions.html#ga6bcad99ce80a0e7e4ddc6f2379081756">SCB_GetFPUType</a></div><div class="ttdeci">__STATIC_INLINE uint32_t SCB_GetFPUType(void)</div><div class="ttdoc">get FPU type</div><div class="ttdef"><b>Definition</b> core_armv81mml.h:2749</div></div>
<div class="ttc" id="agroup___c_m_s_i_s___core___n_v_i_c_functions_html_ga71227e1376cde11eda03fcb62f1b33ea"><div class="ttname"><a href="group___c_m_s_i_s___core___n_v_i_c_functions.html#ga71227e1376cde11eda03fcb62f1b33ea">__NVIC_EnableIRQ</a></div><div class="ttdeci">__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)</div><div class="ttdoc">Enable Interrupt.</div><div class="ttdef"><b>Definition</b> core_armv81mml.h:2187</div></div>
<div class="ttc" id="agroup___c_m_s_i_s___core___n_v_i_c_functions_html_gaa2837003c28c45abf193fe5e8d27f593"><div class="ttname"><a href="group___c_m_s_i_s___core___n_v_i_c_functions.html#gaa2837003c28c45abf193fe5e8d27f593">__NVIC_GetActive</a></div><div class="ttdeci">__STATIC_INLINE uint32_t __NVIC_GetActive(IRQn_Type IRQn)</div><div class="ttdoc">Get Active Interrupt.</div><div class="ttdef"><b>Definition</b> core_armv81mml.h:2293</div></div>
<div class="ttc" id="agroup___c_m_s_i_s___core___n_v_i_c_functions_html_gaabefdd4b790b9a7308929938c0c1e1ad"><div class="ttname"><a href="group___c_m_s_i_s___core___n_v_i_c_functions.html#gaabefdd4b790b9a7308929938c0c1e1ad">__NVIC_SetPendingIRQ</a></div><div class="ttdeci">__STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn)</div><div class="ttdoc">Set Pending Interrupt.</div><div class="ttdef"><b>Definition</b> core_armv81mml.h:2261</div></div>
<div class="ttc" id="agroup___c_m_s_i_s___core___n_v_i_c_functions_html_gaaeb5e7cc0eaad4e2817272e7bf742083"><div class="ttname"><a href="group___c_m_s_i_s___core___n_v_i_c_functions.html#gaaeb5e7cc0eaad4e2817272e7bf742083">__NVIC_GetEnableIRQ</a></div><div class="ttdeci">__STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn)</div><div class="ttdoc">Get Interrupt Enable status.</div><div class="ttdef"><b>Definition</b> core_armv81mml.h:2204</div></div>
<div class="ttc" id="agroup___c_m_s_i_s___core___n_v_i_c_functions_html_gadb94ac5d892b376e4f3555ae0418ebac"><div class="ttname"><a href="group___c_m_s_i_s___core___n_v_i_c_functions.html#gadb94ac5d892b376e4f3555ae0418ebac">NVIC_EncodePriority</a></div><div class="ttdeci">__STATIC_INLINE uint32_t NVIC_EncodePriority(uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)</div><div class="ttdoc">Encode Priority.</div><div class="ttdef"><b>Definition</b> core_armv81mml.h:2429</div></div>
<div class="ttc" id="agroup___c_m_s_i_s___core___n_v_i_c_functions_html_gae016e4c1986312044ee768806537d52f"><div class="ttname"><a href="group___c_m_s_i_s___core___n_v_i_c_functions.html#gae016e4c1986312044ee768806537d52f">__NVIC_DisableIRQ</a></div><div class="ttdeci">__STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn)</div><div class="ttdoc">Disable Interrupt.</div><div class="ttdef"><b>Definition</b> core_armv81mml.h:2223</div></div>
<div class="ttc" id="agroup___c_m_s_i_s___core___n_v_i_c_functions_html_gae4e8f0238527c69f522029b93c8e5b78"><div class="ttname"><a href="group___c_m_s_i_s___core___n_v_i_c_functions.html#gae4e8f0238527c69f522029b93c8e5b78">SysTick_Config</a></div><div class="ttdeci">__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)</div><div class="ttdoc">System Tick Configuration.</div><div class="ttdef"><b>Definition</b> core_armv81mml.h:2831</div></div>
<div class="ttc" id="agroup___c_m_s_i_s___core___n_v_i_c_functions_html_gaeb9dc99c8e7700668813144261b0bc73"><div class="ttname"><a href="group___c_m_s_i_s___core___n_v_i_c_functions.html#gaeb9dc99c8e7700668813144261b0bc73">__NVIC_GetPriority</a></div><div class="ttdeci">__STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn)</div><div class="ttdoc">Get Interrupt Priority.</div><div class="ttdef"><b>Definition</b> core_armv81mml.h:2404</div></div>
<div class="ttc" id="agroup___c_m_s_i_s___core_debug_html_gae1de06155d072758b3453edb07d12459"><div class="ttname"><a href="group___c_m_s_i_s___core_debug.html#gae1de06155d072758b3453edb07d12459">__NVIC_GetPriorityGrouping</a></div><div class="ttdeci">#define __NVIC_GetPriorityGrouping()</div><div class="ttdoc">Get Priority Grouping.</div><div class="ttdef"><b>Definition</b> core_armv8mbl.h:1244</div></div>
<div class="ttc" id="agroup___c_m_s_i_s__core___debug_functions_html_ga00209ce9ee763b476f026ec109c990e5"><div class="ttname"><a href="group___c_m_s_i_s__core___debug_functions.html#ga00209ce9ee763b476f026ec109c990e5">ITM_Type::@207113143355252354017027324254177217277017277273::u16</a></div><div class="ttdeci">__OM uint16_t u16</div><div class="ttdef"><b>Definition</b> core_cm4.h:816</div></div>
<div class="ttc" id="agroup___c_m_s_i_s__core___debug_functions_html_ga020c03908da53c289645e5f060fe2f4f"><div class="ttname"><a href="group___c_m_s_i_s__core___debug_functions.html#ga020c03908da53c289645e5f060fe2f4f">IPSR_Type::@253137242044033212214320374153150066246132133133::ISR</a></div><div class="ttdeci">uint32_t ISR</div><div class="ttdef"><b>Definition</b> core_cm4.h:302</div></div>
<div class="ttc" id="agroup___c_m_s_i_s__core___debug_functions_html_ga03a80aa673650f64aee45ac64dfdc282"><div class="ttname"><a href="group___c_m_s_i_s__core___debug_functions.html#ga03a80aa673650f64aee45ac64dfdc282">APSR_Type::@037126324113151263315255332235014007315272076366::Q</a></div><div class="ttdeci">uint32_t Q</div><div class="ttdef"><b>Definition</b> core_cm4.h:266</div></div>
<div class="ttc" id="agroup___c_m_s_i_s__core___debug_functions_html_ga0a0fb55478366383222f859a919d70d9"><div class="ttname"><a href="group___c_m_s_i_s__core___debug_functions.html#ga0a0fb55478366383222f859a919d70d9">CONTROL_Type::@013142322146330110372376342165035006235066106213::SPSEL</a></div><div class="ttdeci">uint32_t SPSEL</div><div class="ttdef"><b>Definition</b> core_cm4.h:376</div></div>
<div class="ttc" id="agroup___c_m_s_i_s__core___debug_functions_html_ga12e68e55a7badc271b948d6c7230b2a8"><div class="ttname"><a href="group___c_m_s_i_s__core___debug_functions.html#ga12e68e55a7badc271b948d6c7230b2a8">ITM_RxBuffer</a></div><div class="ttdeci">volatile int32_t ITM_RxBuffer</div></div>
<div class="ttc" id="agroup___c_m_s_i_s__core___debug_functions_html_ga161eea27756b1933ceb71141b2c1c6a2"><div class="ttname"><a href="group___c_m_s_i_s__core___debug_functions.html#ga161eea27756b1933ceb71141b2c1c6a2">APSR_Type::@037126324113151263315255332235014007315272076366::V</a></div><div class="ttdeci">uint32_t V</div><div class="ttdef"><b>Definition</b> core_cm4.h:267</div></div>
<div class="ttc" id="agroup___c_m_s_i_s__core___debug_functions_html_ga1888c0864bf87a4494a9521e7eb75ae2"><div class="ttname"><a href="group___c_m_s_i_s__core___debug_functions.html#ga1888c0864bf87a4494a9521e7eb75ae2">xPSR_Type::@314011321112202144176157023160342214235325103102::C</a></div><div class="ttdeci">uint32_t C</div><div class="ttdef"><b>Definition</b> core_cm4.h:329</div></div>
<div class="ttc" id="agroup___c_m_s_i_s__core___debug_functions_html_ga24d5439cf8ad454c76986e8e495f8f71"><div class="ttname"><a href="group___c_m_s_i_s__core___debug_functions.html#ga24d5439cf8ad454c76986e8e495f8f71">ITM_Type::@207113143355252354017027324254177217277017277273::u32</a></div><div class="ttdeci">__OM uint32_t u32</div><div class="ttdef"><b>Definition</b> core_cm4.h:817</div></div>
<div class="ttc" id="agroup___c_m_s_i_s__core___debug_functions_html_ga2c5479a72da1e98ae31b25b7d00e6f5b"><div class="ttname"><a href="group___c_m_s_i_s__core___debug_functions.html#ga2c5479a72da1e98ae31b25b7d00e6f5b">IPSR_Type::@253137242044033212214320374153150066246132133133::_reserved0</a></div><div class="ttdeci">uint32_t _reserved0</div><div class="ttdef"><b>Definition</b> core_cm4.h:303</div></div>
<div class="ttc" id="agroup___c_m_s_i_s__core___debug_functions_html_ga2c9858e7d1675fe63ac44834a9952851"><div class="ttname"><a href="group___c_m_s_i_s__core___debug_functions.html#ga2c9858e7d1675fe63ac44834a9952851">xPSR_Type::@314011321112202144176157023160342214235325103102::Z</a></div><div class="ttdeci">uint32_t Z</div><div class="ttdef"><b>Definition</b> core_cm4.h:330</div></div>
<div class="ttc" id="agroup___c_m_s_i_s__core___debug_functions_html_ga2cb7e5e6e3ecb2460cddc00365f3c61a"><div class="ttname"><a href="group___c_m_s_i_s__core___debug_functions.html#ga2cb7e5e6e3ecb2460cddc00365f3c61a">CONTROL_Type::@013142322146330110372376342165035006235066106213::_reserved0</a></div><div class="ttdeci">uint32_t _reserved0</div><div class="ttdef"><b>Definition</b> core_cm4.h:378</div></div>
<div class="ttc" id="agroup___c_m_s_i_s__core___debug_functions_html_ga2e6a04bdd68255ed242c1c648914ded7"><div class="ttname"><a href="group___c_m_s_i_s__core___debug_functions.html#ga2e6a04bdd68255ed242c1c648914ded7">xPSR_Type::@314011321112202144176157023160342214235325103102::Q</a></div><div class="ttdeci">uint32_t Q</div><div class="ttdef"><b>Definition</b> core_cm4.h:327</div></div>
<div class="ttc" id="agroup___c_m_s_i_s__core___debug_functions_html_ga3dc69c02bdc85efc5c891a925c7a6375"><div class="ttname"><a href="group___c_m_s_i_s__core___debug_functions.html#ga3dc69c02bdc85efc5c891a925c7a6375">CONTROL_Type::@013142322146330110372376342165035006235066106213::nPRIV</a></div><div class="ttdeci">uint32_t nPRIV</div><div class="ttdef"><b>Definition</b> core_cm4.h:375</div></div>
<div class="ttc" id="agroup___c_m_s_i_s__core___debug_functions_html_ga3ff4752800a7352563923648299784ba"><div class="ttname"><a href="group___c_m_s_i_s__core___debug_functions.html#ga3ff4752800a7352563923648299784ba">APSR_Type::@037126324113151263315255332235014007315272076366::_reserved0</a></div><div class="ttdeci">uint32_t _reserved0</div><div class="ttdef"><b>Definition</b> core_cm4.h:263</div></div>
<div class="ttc" id="agroup___c_m_s_i_s__core___debug_functions_html_ga479130e53a8b3c36fd8ee38b503a3911"><div class="ttname"><a href="group___c_m_s_i_s__core___debug_functions.html#ga479130e53a8b3c36fd8ee38b503a3911">FPU_Type::MVFR2</a></div><div class="ttdeci">__IM uint32_t MVFR2</div><div class="ttdef"><b>Definition</b> core_cm4.h:1312</div></div>
<div class="ttc" id="agroup___c_m_s_i_s__core___debug_functions_html_ga47c38d9444d4c758cf6787bed2f4a8f3"><div class="ttname"><a href="group___c_m_s_i_s__core___debug_functions.html#ga47c38d9444d4c758cf6787bed2f4a8f3">xPSR_Type::@314011321112202144176157023160342214235325103102::ICI_IT_1</a></div><div class="ttdeci">uint32_t ICI_IT_1</div><div class="ttdef"><b>Definition</b> core_cm4.h:322</div></div>
<div class="ttc" id="agroup___c_m_s_i_s__core___debug_functions_html_ga517e5d906b9e467c17115a120b6e073d"><div class="ttname"><a href="group___c_m_s_i_s__core___debug_functions.html#ga517e5d906b9e467c17115a120b6e073d">APSR_Type::@037126324113151263315255332235014007315272076366::GE</a></div><div class="ttdeci">uint32_t GE</div><div class="ttdef"><b>Definition</b> core_cm4.h:264</div></div>
<div class="ttc" id="agroup___c_m_s_i_s__core___debug_functions_html_ga54cf3f871c47862b5f3bf041d756c1b0"><div class="ttname"><a href="group___c_m_s_i_s__core___debug_functions.html#ga54cf3f871c47862b5f3bf041d756c1b0">xPSR_Type::@314011321112202144176157023160342214235325103102::ISR</a></div><div class="ttdeci">uint32_t ISR</div><div class="ttdef"><b>Definition</b> core_cm4.h:320</div></div>
<div class="ttc" id="agroup___c_m_s_i_s__core___debug_functions_html_ga609bf0a23fd2f2ea14a7e1179c67a432"><div class="ttname"><a href="group___c_m_s_i_s__core___debug_functions.html#ga609bf0a23fd2f2ea14a7e1179c67a432">APSR_Type::@037126324113151263315255332235014007315272076366::C</a></div><div class="ttdeci">uint32_t C</div><div class="ttdef"><b>Definition</b> core_cm4.h:268</div></div>
<div class="ttc" id="agroup___c_m_s_i_s__core___debug_functions_html_ga6aee20dd7d57d68ef7f162ca8708c327"><div class="ttname"><a href="group___c_m_s_i_s__core___debug_functions.html#ga6aee20dd7d57d68ef7f162ca8708c327">APSR_Type::@037126324113151263315255332235014007315272076366::N</a></div><div class="ttdeci">uint32_t N</div><div class="ttdef"><b>Definition</b> core_cm4.h:270</div></div>
<div class="ttc" id="agroup___c_m_s_i_s__core___debug_functions_html_ga6d6d145872a9a95e164a76136967eccd"><div class="ttname"><a href="group___c_m_s_i_s__core___debug_functions.html#ga6d6d145872a9a95e164a76136967eccd">xPSR_Type::@314011321112202144176157023160342214235325103102::_reserved1</a></div><div class="ttdeci">uint32_t _reserved1</div><div class="ttdef"><b>Definition</b> core_cm4.h:324</div></div>
<div class="ttc" id="agroup___c_m_s_i_s__core___debug_functions_html_ga7e95d81e18c798719e10890add614452"><div class="ttname"><a href="group___c_m_s_i_s__core___debug_functions.html#ga7e95d81e18c798719e10890add614452">CONTROL_Type::@013142322146330110372376342165035006235066106213::FPCA</a></div><div class="ttdeci">uint32_t FPCA</div><div class="ttdef"><b>Definition</b> core_cm4.h:377</div></div>
<div class="ttc" id="agroup___c_m_s_i_s__core___debug_functions_html_ga84ec11223673f2be57ad0cd60e3a8dda"><div class="ttname"><a href="group___c_m_s_i_s__core___debug_functions.html#ga84ec11223673f2be57ad0cd60e3a8dda">xPSR_Type::@314011321112202144176157023160342214235325103102::GE</a></div><div class="ttdeci">uint32_t GE</div><div class="ttdef"><b>Definition</b> core_cm4.h:323</div></div>
<div class="ttc" id="agroup___c_m_s_i_s__core___debug_functions_html_ga959fe89501908e94844ce2e085c1c62e"><div class="ttname"><a href="group___c_m_s_i_s__core___debug_functions.html#ga959fe89501908e94844ce2e085c1c62e">ITM_Type::@207113143355252354017027324254177217277017277273::u8</a></div><div class="ttdeci">__OM uint8_t u8</div><div class="ttdef"><b>Definition</b> core_cm4.h:815</div></div>
<div class="ttc" id="agroup___c_m_s_i_s__core___debug_functions_html_ga95d6229e895bd5e89d70930065bd94f8"><div class="ttname"><a href="group___c_m_s_i_s__core___debug_functions.html#ga95d6229e895bd5e89d70930065bd94f8">xPSR_Type::@314011321112202144176157023160342214235325103102::ICI_IT_2</a></div><div class="ttdeci">uint32_t ICI_IT_2</div><div class="ttdef"><b>Definition</b> core_cm4.h:326</div></div>
<div class="ttc" id="agroup___c_m_s_i_s__core___debug_functions_html_gaa5184c040454501865325e66d9fc64d8"><div class="ttname"><a href="group___c_m_s_i_s__core___debug_functions.html#gaa5184c040454501865325e66d9fc64d8">xPSR_Type::@314011321112202144176157023160342214235325103102::T</a></div><div class="ttdeci">uint32_t T</div><div class="ttdef"><b>Definition</b> core_cm4.h:325</div></div>
<div class="ttc" id="agroup___c_m_s_i_s__core___debug_functions_html_gaa822cb398ee022b59e9e6c5d7bbb228a"><div class="ttname"><a href="group___c_m_s_i_s__core___debug_functions.html#gaa822cb398ee022b59e9e6c5d7bbb228a">ITM_RXBUFFER_EMPTY</a></div><div class="ttdeci">#define ITM_RXBUFFER_EMPTY</div><div class="ttdef"><b>Definition</b> core_armv81mml.h:2892</div></div>
<div class="ttc" id="agroup___c_m_s_i_s__core___debug_functions_html_gab2d177f2a46e98a7fd51788630a90e9f"><div class="ttname"><a href="group___c_m_s_i_s__core___debug_functions.html#gab2d177f2a46e98a7fd51788630a90e9f">xPSR_Type::@314011321112202144176157023160342214235325103102::N</a></div><div class="ttdeci">uint32_t N</div><div class="ttdef"><b>Definition</b> core_cm4.h:331</div></div>
<div class="ttc" id="agroup___c_m_s_i_s__core___debug_functions_html_gab5eacf5e26d254a569c0f022c8b30479"><div class="ttname"><a href="group___c_m_s_i_s__core___debug_functions.html#gab5eacf5e26d254a569c0f022c8b30479">xPSR_Type::@314011321112202144176157023160342214235325103102::V</a></div><div class="ttdeci">uint32_t V</div><div class="ttdef"><b>Definition</b> core_cm4.h:328</div></div>
<div class="ttc" id="agroup___c_m_s_i_s__core___debug_functions_html_gaba563115509fe04ec94ea2b95de44a79"><div class="ttname"><a href="group___c_m_s_i_s__core___debug_functions.html#gaba563115509fe04ec94ea2b95de44a79">APSR_Type::@037126324113151263315255332235014007315272076366::_reserved1</a></div><div class="ttdeci">uint32_t _reserved1</div><div class="ttdef"><b>Definition</b> core_cm4.h:265</div></div>
<div class="ttc" id="agroup___c_m_s_i_s__core___debug_functions_html_gabe24c0efd56e8ce90fda55c1d0134371"><div class="ttname"><a href="group___c_m_s_i_s__core___debug_functions.html#gabe24c0efd56e8ce90fda55c1d0134371">APSR_Type::@037126324113151263315255332235014007315272076366::Z</a></div><div class="ttdeci">uint32_t Z</div><div class="ttdef"><b>Definition</b> core_cm4.h:269</div></div>
<div class="ttc" id="agroup___c_m_s_i_s__core___debug_functions_html_gac3ee2c30a1ac4ed34c8a866a17decd53"><div class="ttname"><a href="group___c_m_s_i_s__core___debug_functions.html#gac3ee2c30a1ac4ed34c8a866a17decd53">ITM_ReceiveChar</a></div><div class="ttdeci">__STATIC_INLINE int32_t ITM_ReceiveChar(void)</div><div class="ttdoc">ITM Receive Character.</div><div class="ttdef"><b>Definition</b> core_armv81mml.h:2924</div></div>
<div class="ttc" id="agroup___c_m_s_i_s__core___debug_functions_html_gac90a497bd64286b84552c2c553d3419e"><div class="ttname"><a href="group___c_m_s_i_s__core___debug_functions.html#gac90a497bd64286b84552c2c553d3419e">ITM_SendChar</a></div><div class="ttdeci">__STATIC_INLINE uint32_t ITM_SendChar(uint32_t ch)</div><div class="ttdoc">ITM Send Character.</div><div class="ttdef"><b>Definition</b> core_armv81mml.h:2903</div></div>
<div class="ttc" id="agroup___c_m_s_i_s__core___debug_functions_html_gae61ce9ca5917735325cd93b0fb21dd29"><div class="ttname"><a href="group___c_m_s_i_s__core___debug_functions.html#gae61ce9ca5917735325cd93b0fb21dd29">ITM_CheckChar</a></div><div class="ttdeci">__STATIC_INLINE int32_t ITM_CheckChar(void)</div><div class="ttdoc">ITM Check Character.</div><div class="ttdef"><b>Definition</b> core_armv81mml.h:2944</div></div>
<div class="ttc" id="agroup___c_m_s_i_s__core___debug_functions_html_gaecc118f90b711962ad255e03cd432e11"><div class="ttname"><a href="group___c_m_s_i_s__core___debug_functions.html#gaecc118f90b711962ad255e03cd432e11">xPSR_Type::@314011321112202144176157023160342214235325103102::_reserved0</a></div><div class="ttdeci">uint32_t _reserved0</div><div class="ttdef"><b>Definition</b> core_cm4.h:321</div></div>
<div class="ttc" id="agroup___configuration__section__for___c_m_s_i_s_html_gae3fe3587d5100c787e02102ce3944460"><div class="ttname"><a href="group___configuration__section__for___c_m_s_i_s.html#gae3fe3587d5100c787e02102ce3944460">__NVIC_PRIO_BITS</a></div><div class="ttdeci">#define __NVIC_PRIO_BITS</div><div class="ttdef"><b>Definition</b> stm32h723xx.h:216</div></div>
<div class="ttc" id="agroup___peripheral__interrupt__number__definition_html_ga7e1129cd8a196f4284d41db3e82ad5c8"><div class="ttname"><a href="group___peripheral__interrupt__number__definition.html#ga7e1129cd8a196f4284d41db3e82ad5c8">IRQn_Type</a></div><div class="ttdeci">IRQn_Type</div><div class="ttdoc">STM32H7XX Interrupt Number Definition, according to the selected device in Library_configuration_sect...</div><div class="ttdef"><b>Definition</b> stm32h723xx.h:49</div></div>
<div class="ttc" id="agroup___peripheral__interrupt__number__definition_html_gga7e1129cd8a196f4284d41db3e82ad5c8a6dbff8f8543325f3474cbae2446776e7"><div class="ttname"><a href="group___peripheral__interrupt__number__definition.html#gga7e1129cd8a196f4284d41db3e82ad5c8a6dbff8f8543325f3474cbae2446776e7">SysTick_IRQn</a></div><div class="ttdeci">@ SysTick_IRQn</div><div class="ttdef"><b>Definition</b> stm32h723xx.h:59</div></div>
<div class="ttc" id="astruct_core_debug___type_html"><div class="ttname"><a href="struct_core_debug___type.html">CoreDebug_Type</a></div><div class="ttdoc">Structure type to access the Core Debug Register (CoreDebug).</div><div class="ttdef"><b>Definition</b> core_armv81mml.h:1877</div></div>
<div class="ttc" id="astruct_d_w_t___type_html"><div class="ttname"><a href="struct_d_w_t___type.html">DWT_Type</a></div><div class="ttdoc">Structure type to access the Data Watchpoint and Trace Register (DWT).</div><div class="ttdef"><b>Definition</b> core_armv81mml.h:1203</div></div>
<div class="ttc" id="astruct_f_p_u___type_html"><div class="ttname"><a href="struct_f_p_u___type.html">FPU_Type</a></div><div class="ttdoc">Structure type to access the Floating Point Unit (FPU).</div><div class="ttdef"><b>Definition</b> core_armv81mml.h:1747</div></div>
<div class="ttc" id="astruct_i_t_m___type_html"><div class="ttname"><a href="struct_i_t_m___type.html">ITM_Type</a></div><div class="ttdoc">Structure type to access the Instrumentation Trace Macrocell Register (ITM).</div><div class="ttdef"><b>Definition</b> core_armv81mml.h:1088</div></div>
<div class="ttc" id="astruct_m_p_u___type_html"><div class="ttname"><a href="struct_m_p_u___type.html">MPU_Type</a></div><div class="ttdoc">Structure type to access the Memory Protection Unit (MPU).</div><div class="ttdef"><b>Definition</b> core_armv81mml.h:1545</div></div>
<div class="ttc" id="astruct_n_v_i_c___type_html"><div class="ttname"><a href="struct_n_v_i_c___type.html">NVIC_Type</a></div><div class="ttdoc">Structure type to access the Nested Vectored Interrupt Controller (NVIC).</div><div class="ttdef"><b>Definition</b> core_armv81mml.h:463</div></div>
<div class="ttc" id="astruct_s_c_b___type_html"><div class="ttname"><a href="struct_s_c_b___type.html">SCB_Type</a></div><div class="ttdoc">Structure type to access the System Control Block (SCB).</div><div class="ttdef"><b>Definition</b> core_armv81mml.h:499</div></div>
<div class="ttc" id="astruct_s_cn_s_c_b___type_html"><div class="ttname"><a href="struct_s_cn_s_c_b___type.html">SCnSCB_Type</a></div><div class="ttdoc">Structure type to access the System Control and ID Register not in the SCB.</div><div class="ttdef"><b>Definition</b> core_armv81mml.h:1011</div></div>
<div class="ttc" id="astruct_sys_tick___type_html"><div class="ttname"><a href="struct_sys_tick___type.html">SysTick_Type</a></div><div class="ttdoc">Structure type to access the System Timer (SysTick).</div><div class="ttdef"><b>Definition</b> core_armv81mml.h:1036</div></div>
<div class="ttc" id="astruct_t_p_i___type_html"><div class="ttname"><a href="struct_t_p_i___type.html">TPI_Type</a></div><div class="ttdoc">Structure type to access the Trace Port Interface Register (TPI).</div><div class="ttdef"><b>Definition</b> core_armv81mml.h:1389</div></div>
<div class="ttc" id="aunion_a_p_s_r___type_html"><div class="ttname"><a href="union_a_p_s_r___type.html">APSR_Type</a></div><div class="ttdoc">Union type to access the Application Program Status Register (APSR).</div><div class="ttdef"><b>Definition</b> core_armv81mml.h:316</div></div>
<div class="ttc" id="aunion_c_o_n_t_r_o_l___type_html"><div class="ttname"><a href="union_c_o_n_t_r_o_l___type.html">CONTROL_Type</a></div><div class="ttdoc">Union type to access the Control Registers (CONTROL).</div><div class="ttdef"><b>Definition</b> core_armv81mml.h:424</div></div>
<div class="ttc" id="aunion_i_p_s_r___type_html"><div class="ttname"><a href="union_i_p_s_r___type.html">IPSR_Type</a></div><div class="ttdoc">Union type to access the Interrupt Program Status Register (IPSR).</div><div class="ttdef"><b>Definition</b> core_armv81mml.h:355</div></div>
<div class="ttc" id="aunionx_p_s_r___type_html"><div class="ttname"><a href="unionx_p_s_r___type.html">xPSR_Type</a></div><div class="ttdoc">Union type to access the Special-Purpose Program Status Registers (xPSR).</div><div class="ttdef"><b>Definition</b> core_armv81mml.h:373</div></div>
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